Hi Bjorn,
I managed to trigger the issue from userspace without having to call
into any ACPI code. Wrote a little script[1] which essentially does
(and prints) this (I've added some comments):
PCI SCAN
# set PCIe link speed to 2.5. Bug doesn't trigger with 5.0 or 8.0
# NVA is a small lib we use t
ohh nvm. It was a mistake on my end. Sorry for the noise
On Wed, Jun 19, 2019 at 2:07 PM Karol Herbst wrote:
>
> Hi Bjorn,
>
> I was playing around with some older information again (write into the
> PCI config to put the card into d3 state). And there is something
> which made me very curious:
>
Hi Bjorn,
I was playing around with some older information again (write into the
PCI config to put the card into d3 state). And there is something
which made me very curious:
If I put the card manually into any other state besides D0 via the
0x64 pci config register, the card just dies and pci cor
On Mon, Jun 03, 2019 at 03:18:56PM +0200, Karol Herbst wrote:
> @bjorn: any further ideas? Otherwise I'd like to just go ahead and fix
> this issue inside Nouveau and leave it there until we have a better
> understanding or non Nouveau cases of this issue.
Nope, I have no more ideas.
> On Tue, Ma
@bjorn: any further ideas? Otherwise I'd like to just go ahead and fix
this issue inside Nouveau and leave it there until we have a better
understanding or non Nouveau cases of this issue.
On Tue, May 21, 2019 at 7:48 PM Karol Herbst wrote:
>
> doing the same on the bridge controller with my work
doing the same on the bridge controller with my workarounds applied:
please note some differences:
LnkSta: Speed 8GT/s (ok) vs Speed 2.5GT/s (downgraded)
SltSta: PresDet+ vs PresDet-
LnkSta2: Equalization stuff
Virtual channel: NegoPending- vs NegoPending+
both times I executed lspci while the GP
was able to get the lspci prints via ssh. Machine rebooted
automatically each time though.
relevant dmesg:
kernel: nouveau :01:00.0: Refused to change power state, currently in D3
kernel: nouveau :01:00.0: Refused to change power state, currently in D3
kernel: nouveau :01:00.0: Refused
On Tue, May 21, 2019 at 4:13 PM Bjorn Helgaas wrote:
>
> On Tue, May 21, 2019 at 03:28:48PM +0200, Karol Herbst wrote:
> > On Tue, May 21, 2019 at 3:11 PM Bjorn Helgaas wrote:
> > > On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> > > > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaa
On Tue, May 21, 2019 at 03:28:48PM +0200, Karol Herbst wrote:
> On Tue, May 21, 2019 at 3:11 PM Bjorn Helgaas wrote:
> > On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> > > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas wrote:
> > > > On Tue, May 07, 2019 at 10:12:45PM +0200, Karo
On Tue, May 21, 2019 at 3:51 PM Ilia Mirkin wrote:
>
> On Tue, May 21, 2019 at 9:29 AM Karol Herbst wrote:
> >
> > On Tue, May 21, 2019 at 3:11 PM Bjorn Helgaas wrote:
> > >
> > > On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> > > > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas
On Tue, May 21, 2019 at 9:29 AM Karol Herbst wrote:
>
> On Tue, May 21, 2019 at 3:11 PM Bjorn Helgaas wrote:
> >
> > On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> > > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas wrote:
> > > > On Tue, May 07, 2019 at 10:12:45PM +0200, Karol H
On Tue, May 21, 2019 at 3:11 PM Bjorn Helgaas wrote:
>
> On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas wrote:
> > > On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote:
> > > > Apperantly things go south if we suspend the
On Tue, May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote:
> On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas wrote:
> > On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote:
> > > Apperantly things go south if we suspend the device with a different PCIE
> > > link speed set than it got b
On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas wrote:
>
> On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote:
> > Apperantly things go south if we suspend the device with a different PCIE
> > link speed set than it got booted with. Fixes runtime suspend on my gp107.
> >
> > This all look
On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote:
> Apperantly things go south if we suspend the device with a different PCIE
> link speed set than it got booted with. Fixes runtime suspend on my gp107.
>
> This all looks like some bug inside the pci subsystem and I would prefer a
> fi
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