Re: [PATCH v2 1/4] softmmu: Support concurrent bounce buffers

On Wed, Aug 23, 2023 at 10:54 PM Peter Xu wrote: > > On Wed, Aug 23, 2023 at 10:08:08PM +0200, Mattias Nissler wrote: > > Peter, thanks for taking a look and providing feedback! > > > > On Wed, Aug 23, 2023 at 7:35 PM Peter Xu wrote: > > > > > > On Wed, Aug 23, 2023 at 02:29:02AM -0700, Mattias N

Re: [PULL 00/12] First batch of s390x patches for QEMU 8.2

On 23/08/2023 18.34, Stefan Hajnoczi wrote: On Wed, Aug 23, 2023 at 01:45:32PM +0200, Thomas Huth wrote: The following changes since commit b0dd9a7d6dd15a6898e9c585b521e6bec79b25aa: Open 8.2 development tree (2023-08-22 07:14:07 -0700) are available in the Git repository at: https://git

Re: [PATCH v2 42/58] i386/tdx: register the fd read callback with the main loop to read the quote data

On 8/18/2023 5:50 PM, Xiaoyao Li wrote: > From: Chenyi Qiang > > When TD guest invokes getquote tdvmcall, QEMU will register a async qio > task with default context when the qio channel is connected. However, as > there is a blocking action (recvmsg()) in qio_channel_read() and it will > block

Re: [PATCH] softmmu: Fix dirtylimit memory leak

On 2023/8/24 13:16, Michael Tokarev wrote: 23.08.2023 10:47, alloc.yo...@outlook.com wrote: From: "alloc.young" Fix memory leak in hmp_info_vcpu_dirty_limit,use g_autoptr handle memory deallocation, alse use g_free to match g_malloc && g_new functions. "..use g_autoptr TO handle.." ("to" i

Re: constructor vs. __constructor__

Liu Jaloo writes: > What's the difference between "__attribute__((constructor))" and > "__attribute__((__constructor__))" in qemu source? Reading the fine manual helps: You may optionally specify attribute names with ‘__’ preceding and following the name. This allows you to use them i

Re: [PATCH] softmmu: Fix dirtylimit memory leak

23.08.2023 10:47, alloc.yo...@outlook.com wrote: From: "alloc.young" Fix memory leak in hmp_info_vcpu_dirty_limit,use g_autoptr handle memory deallocation, alse use g_free to match g_malloc && g_new functions. "..use g_autoptr TO handle.." ("to" is missing). "alse" - I guess should be "Also".

constructor vs. __constructor__

What's the difference between "__attribute__((constructor))" and "__attribute__((__constructor__))" in qemu source?

[PATCH] softmmu: Fix dirtylimit memory leak

From: "alloc.young" Fix memory leak in hmp_info_vcpu_dirty_limit,use g_autoptr to handle memory deallocation. Signed-off-by: alloc.young Reviewed-by: Yong Huang --- v1->v2 drop g_free, just focus on fix memory leak issue --- softmmu/dirtylimit.c | 16 +++- 1 file changed, 7 inse

回复: [PATCH] softmmu: Fix dirtylimit memory leak

发件人: Yong Huang 发送时间: 2023年8月24日 8:31 收件人: alloc.yo...@outlook.com 抄送: qemu-devel@nongnu.org 主题: Re: [PATCH] softmmu: Fix dirtylimit memory leak On Wed, Aug 23, 2023 at 3:48 PM mailto:alloc.yo...@outlook.com>> wrote: From: "alloc.young" mailto:alloc.y

[PATCH 10/13] linux-user: Move shmat and shmdt implementations to mmap.c

Rename from do_* to target_*. Fix some minor checkpatch errors. Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Signed-off-by: Richard Henderson --- linux-user/user-mmap.h | 4 ++ linux-user/mmap.c | 138 ++

[PATCH 11/13] linux-user: Use WITH_MMAP_LOCK_GUARD in target_{shmat, shmdt}

Move the CF_PARALLEL setting outside of the mmap lock. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 98 ++- 1 file changed, 46 insertions(+), 52 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 3aeacd1ecd..f45b2d307c 1

[PATCH 13/13] linux-user: Track shm regions with an interval tree

Remove the fixed size shm_regions[] array. Remove references when other mappings completely remove or replace a region. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 81 +++ 1 file changed, 53 insertions(+), 28 deletions(-) diff --git a/lin

[PATCH 09/13] linux-user: Remove ELF_START_MMAP and image_info.start_mmap

The start_mmap value is write-only. Remove the field and the defines that populated it. Logically, this has been replaced by task_unmapped_base. Tested-by: Helge Deller Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/qemu.h

[PATCH 04/13] util/selfmap: Use dev_t and ino_t in MapInfo

Use dev_t instead of a string, and ino_t instead of uint64_t. The latter is likely to be identical on modern systems but is more type-correct for usage. Tested-by: Helge Deller Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/qemu/

[PATCH 07/13] linux-user: Show heap address in /proc/pid/maps

Tested-by: Helge Deller Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- linux-user/syscall.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 0b91f996b7..0641d8f433 100644 --- a/linux-user/syscall.c +++ b/linux-user/sysca

[PATCH 05/13] linux-user: Use walk_memory_regions for open_self_maps

Replace the by-hand method of region identification with the official user-exec interface. Cross-check the region provided to the callback with the interval tree from read_self_maps(). Tested-by: Helge Deller Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- linux-user/syscal

[PATCH 01/13] linux-user: Split out cpu/target_proc.h

Move the various open_cpuinfo functions into new files. Move the m68k open_hardware function as well. All other guest architectures get a boilerplate empty file. Signed-off-by: Richard Henderson --- linux-user/aarch64/target_proc.h | 1 + linux-user/alpha/target_proc.h | 1 + linux

[PATCH 03/13] linux-user: Emulate /proc/cpuinfo for Alpha

From: Helge Deller Add emulation for /proc/cpuinfo for the alpha architecture. alpha output example: (alpha-chroot)root@p100:/# cat /proc/cpuinfo cpu : Alpha cpu model : ev67 cpu variation : 0 cpu revision: 0 cpu serial number : JA00

[PATCH 06/13] linux-user: Adjust brk for load_bias

PIE executables are usually linked at offset 0 and are relocated somewhere during load. The hiaddr needs to be adjusted to keep the brk next to the executable. Cc: qemu-sta...@nongnu.org Fixes: 1f356e8c013 ("linux-user: Adjust initial brk when interpreter is close to executable") Tested-by: Helg

[PATCH 08/13] linux-user: Emulate the Anonymous: keyword in /proc/self/smaps

From: Ilya Leoshkevich Core dumps produced by gdb's gcore when connected to qemu's gdbstub lack stack. The reason is that gdb includes only anonymous memory in core dumps, which is distinguished by a non-0 Anonymous: value. Consider the mappings with PAGE_ANON fully anonymous, and the mappings w

[PATCH 00/13] linux-user patch queue

Combine a bunch of smaller linux-user patches: Supercedes: 20230801230842.414421-1-del...@gmx.de ("[PATCH v2 0/3] linux-user: /proc/cpuinfo fix and content emulation for arm") Supercedes: 20230807122206.655701-1-...@linux.ibm.com ("[PATCH v2] linux-user: Emulate the Anonymous: keyword in /proc/sel

[PATCH 12/13] linux-user: Fix shmdt

If the shm region is not mapped at shmaddr, EINVAL. Do not unmap the region until the syscall succeeds. Use mmap_reserve_or_unmap to preserve reserved_va semantics. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) di

[PATCH 02/13] linux-user: Emulate /proc/cpuinfo on aarch64 and arm

From: Helge Deller Add emulation for /proc/cpuinfo for arm architecture. The output below mimics output as seen on debian porterboxes. aarch64 output example: processor : 0 model name : ARMv8 Processor rev 0 (v8l) BogoMIPS: 100.00 Features: swp half thumb fast_mult vf

[PATCH v2] target/loongarch: cpu: Implement get_arch_id callback

Implement the callback for getting the architecture-dependent CPU ID, the cpu ID is physical id described in ACPI MADT table, this will be used for cpu hotplug. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- v1->v2: remove unuseful changeid. --- hw/loongarch/virt.c| 2 ++ target/loong

Re: NVMe ZNS last zone size

Klaus Jensen 于2023年8月24日周四 02:53写道： > > On Aug 23 22:58, Sam Li wrote: > > Stefan Hajnoczi 于2023年8月23日周三 22:41写道： > > > > > > On Wed, 23 Aug 2023 at 10:24, Sam Li wrote: > > > > > > > > Hi Stefan, > > > > > > > > Stefan Hajnoczi 于2023年8月23日周三 21:26写道： > > > > > > > > > > Hi Sam and Klaus, > > >

Re: [PATCH] softmmu: Fix dirtylimit memory leak

On Wed, Aug 23, 2023 at 3:48 PM wrote: > From: "alloc.young" > > Fix memory leak in hmp_info_vcpu_dirty_limit,use g_autoptr > handle memory deallocation, alse use g_free to match g_malloc > && g_new functions. > > Signed-off-by: alloc.young > --- > softmmu/dirtylimit.c | 26 ---

[PATCH v2 1/4] block: remove AIOCBInfo->get_aio_context()

The synchronous bdrv_aio_cancel() function needs the acb's AioContext so it can call aio_poll() to wait for cancellation. It turns out that all users run under the BQL in the main AioContext, so this callback is not needed. Remove the callback, mark bdrv_aio_cancel() GLOBAL_STATE_CODE just like i

[PATCH v2 4/4] block-coroutine-wrapper: use qemu_get_current_aio_context()

Use qemu_get_current_aio_context() in mixed wrappers and coroutine wrappers so that code runs in the caller's AioContext instead of moving to the BlockDriverState's AioContext. This change is necessary for the multi-queue block layer where any thread can call into the block layer. Most wrappers ar

[PATCH v2 0/4] block-backend: process I/O in the current AioContext

v2 - Add patch to remove AIOCBInfo->get_aio_context() [Kevin] - Add patch to use qemu_get_current_aio_context() in block-coroutine-wrapper so that the wrappers use the current AioContext instead of bdrv_get_aio_context(). Switch blk_aio_*() APIs over to multi-queue by using qemu_get_current_ai

[PATCH v2 3/4] block-backend: process zoned requests in the current AioContext

Process zoned requests in the current thread's AioContext instead of in the BlockBackend's AioContext. There is no need to use the BlockBackend's AioContext thanks to CoMutex bs->wps->colock, which protects zone metadata. Signed-off-by: Stefan Hajnoczi --- block/block-backend.c | 12 ++-

[PATCH v2 2/4] block-backend: process I/O in the current AioContext

Switch blk_aio_*() APIs over to multi-queue by using qemu_get_current_aio_context() instead of blk_get_aio_context(). This change will allow devices to process I/O in multiple IOThreads in the future. I audited existing blk_aio_*() callers: - migration/block.c: blk_mig_lock() protects the data acc

[PATCH 2/2] io: follow coroutine AioContext in qio_channel_yield()

The ongoing QEMU multi-queue block layer effort makes it possible for multiple threads to process I/O in parallel. The nbd block driver is not compatible with the multi-queue block layer yet because QIOChannel cannot be used easily from coroutines running in multiple threads. This series changes th

[PATCH 0/2] io: follow coroutine AioContext in qio_channel_yield()

The ongoing QEMU multi-queue block layer effort makes it possible for multiple threads to process I/O in parallel. The nbd block driver is not compatible with the multi-queue block layer yet because QIOChannel cannot be used easily from coroutines running in multiple threads. This series changes th

[PATCH 1/2] io: check there are no qio_channel_yield() coroutines during ->finalize()

Callers must clean up their coroutines before calling object_unref(OBJECT(ioc)) to prevent an fd handler leak. Add an assertion to check this. This patch is preparation for the fd handler changes that follow. Signed-off-by: Stefan Hajnoczi --- io/channel.c | 4 1 file changed, 4 insertions

Re: [PULL 00/12] First batch of s390x patches for QEMU 8.2

On Wed, Aug 23, 2023 at 01:45:32PM +0200, Thomas Huth wrote: > The following changes since commit b0dd9a7d6dd15a6898e9c585b521e6bec79b25aa: > > Open 8.2 development tree (2023-08-22 07:14:07 -0700) > > are available in the Git repository at: > > https://gitlab.com/thuth/qemu.git tags/pull-re

Re: [PATCH v2 0/8] tcg: Document *swap* helper implementations

On 23/8/23 20:46, Richard Henderson wrote: On 8/23/23 07:55, Philippe Mathieu-Daudé wrote: Philippe Mathieu-Daudé (8):    tcg/tcg-op: Document bswap16_i32() byte pattern    tcg/tcg-op: Document bswap16_i64() byte pattern    tcg/tcg-op: Document bswap32_i32() byte pattern    tcg/tcg-op: Document

Re: [PATCH v2 1/4] softmmu: Support concurrent bounce buffers

On Wed, Aug 23, 2023 at 10:08:08PM +0200, Mattias Nissler wrote: > Peter, thanks for taking a look and providing feedback! > > On Wed, Aug 23, 2023 at 7:35 PM Peter Xu wrote: > > > > On Wed, Aug 23, 2023 at 02:29:02AM -0700, Mattias Nissler wrote: > > > When DMA memory can't be directly accessed,

[PULL 01/48] accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint

From: Anton Johansson via Widens the pc and saved_insn fields of kvm_sw_breakpoint from target_ulong to vaddr. The pc argument of kvm_find_sw_breakpoint is also widened to match. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-2-a...@rev.ng> Signe

[PULL 32/48] tcg/i386: Merge tcg_out_brcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 110 +- 1 file changed, 49 insertions(+), 61 deletions(-) diff --git

[PULL 47/48] docs/devel/tcg-ops: fix missing newlines in "Host vector operations"

From: Mark Cave-Ayland This unintentionally causes the mov_vec, ld_vec and st_vec operations to appear on the same line. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230823141740.35974-1-mark.cave-ayl...@ilande.co.uk> Signed-off-by: Richard Henderson ---

[PULL 48/48] tcg: spelling fixes

From: Michael Tokarev Acked-by: Alex Bennée Signed-off-by: Michael Tokarev Message-Id: <20230823065335.1919380-4-...@tls.msk.ru> Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 10 ++ tcg/riscv/tcg-target.c.inc | 4 ++-- 3 f

[PULL 42/48] tcg/tcg-op: Document bswap32_i64() byte pattern

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-5-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index ed0ab218

[PULL 45/48] tcg/tcg-op: Document wswap_i64() byte pattern

From: Philippe Mathieu-Daudé Document wswap_i64(), added in commit 46be8425ff ("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}"). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-8-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/t

[PULL 44/48] tcg/tcg-op: Document hswap_i32/64() byte pattern

From: Philippe Mathieu-Daudé Document hswap_i32() and hswap_i64(), added in commit 46be8425ff ("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}"). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-7-phi...@linaro.org> Signed-off-by: Richard Hende

[PULL 43/48] tcg/tcg-op: Document bswap64_i64() byte pattern

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230823145542.79633-6-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index

[PULL 41/48] tcg/tcg-op: Document bswap32_i32() byte pattern

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-4-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 88c7c60ffe..ed0ab218a1 100644 -

[PULL 19/48] target/arm: Use tcg_gen_negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 22 +- target/arm/tcg/translate.c | 12 2 files changed, 13 insertions(+), 21 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate

[PULL 38/48] tcg/i386: Implement negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 4 ++-- tcg/i386/tcg-target.c.inc | 32 2 files changed, 26 insertions(+), 10 deletions(-) diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index ebc0b1a6ce..8

[PULL 46/48] target/cris: Fix a typo in gen_swapr()

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-9-phi...@linaro.org> Signed-off-by: Richard Henderson --- target/cris/translate.c | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target/cris/translate

[PULL 17/48] tcg: Use tcg_gen_negsetcond_*

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/tcg-op-gvec.c | 6 ++ tcg/tcg-op.c | 6 ++ 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index a062239804..e260a07c61 10064

[PULL 40/48] tcg/tcg-op: Document bswap16_i64() byte pattern

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-3-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 27 +++ 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op

[PULL 13/48] tcg/i386: Allow immediate as input to deposit_*

We can use MOVB and MOVW with an immediate just as easily as with a register input. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target-con-set.h | 2 +- tcg/i386/tcg-target.c.inc | 26 ++ 2 files changed, 23 insertions(+), 5 deletion

[PULL 16/48] tcg: Introduce negsetcond opcodes

Introduce a new opcode for negative setcond. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/devel/tcg-ops.rst | 6 ++ include/tcg/tcg-op-common.h | 4 include/tcg/tcg-op.h | 2 ++ include/tcg/tcg-opc.h| 2 ++ include/tcg/tcg.h

[PULL 15/48] tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32

Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync. Reported-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-id: <20230822175127.1173698-1-richard.he

[PULL 28/48] tcg/arm: Implement negsetcond_i32

Trivial, as we simply need to load a different constant in the conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 9 + 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-ta

[PULL 27/48] tcg/aarch64: Implement negsetcond_*

Trivial, as aarch64 has an instruction for this: CSETM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 4 ++-- tcg/aarch64/tcg-target.c.inc | 12 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/tcg/aarch64/tcg-target.

[PULL 30/48] tcg/s390x: Implement negsetcond_*

Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 4 +- tcg/s390x/tcg-target.c.inc | 78 +- 2 files changed, 54 insertions(+), 28 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 123a4b1645..50e12ef9d6 100644 ---

[PULL 02/48] accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint

From: Anton Johansson via Widens the pc and saved_insn fields of hvf_sw_breakpoint from target_ulong to vaddr. Other hvf_* functions accessing hvf_sw_breakpoint are also widened to match. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-3-a...@rev.

[PULL 29/48] tcg/riscv: Implement negsetcond_*

Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.h | 4 ++-- tcg/riscv/tcg-target.c.inc | 45 ++ 2 files changed, 47 insertions(+), 2 deletions(-) diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h

[PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge

The setcond + neg + or sequence is a complex method of performing a conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/sparc/translate.c | 17 - 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/target/sparc/translate.c b/target

[PULL 20/48] target/m68k: Use tcg_gen_negsetcond_*

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/m68k/translate.c | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index d08e823b6c..15b3701b

[PULL 07/48] include/exec: Widen tlb_hit/tlb_hit_page()

From: Anton Johansson via tlb_addr is changed from target_ulong to uint64_t to match the type of a CPUTLBEntry value, and the addressed is changed to vaddr. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-8-a...@rev.ng> Signed-off-by: Richard Hend

[PULL 22/48] target/ppc: Use tcg_gen_negsetcond_*

Tested-by: Nicholas Piggin Reviewed-by: Nicholas Piggin Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/translate/fixedpoint-impl.c.inc | 6 -- target/ppc/translate/vmx-impl.c.inc| 8 +++- 2 files changed, 7 insertions(+), 7 deletions(-) di

[PULL 39/48] tcg/tcg-op: Document bswap16_i32() byte pattern

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230823145542.79633-2-phi...@linaro.org> Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 27 +++ 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op

[PULL 24/48] target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bastian Koppelmann Signed-off-by: Richard Henderson --- target/tricore/translate.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 1947733870..6ae

[PULL 37/48] tcg/i386: Use shift in tcg_out_setcond

For LT/GE vs zero, shift down the sign bit. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 15 +++ 1 file changed, 15 insertions(+) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 3f3c114efd..16e830051d 100644 --

[PULL 06/48] include/exec: typedef abi_ptr to vaddr in softmmu

From: Anton Johansson via In system mode, abi_ptr is primarily used for representing addresses when accessing guest memory with cpu_[st|ld]*(). Widening it from target_ulong to vaddr reduces the target dependence of these functions and is step towards building accel/ once for system mode. Signed

[PULL 26/48] tcg/ppc: Use the Set Boolean Extension

The SETBC family of instructions requires exactly two insns for all comparisions, saving 0-3 insns per (neg)setcond. Tested-by: Nicholas Piggin Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 22 ++ 1 file changed, 22 ins

[PULL 35/48] tcg/i386: Use CMP+SBB in tcg_out_setcond

Use the carry bit to optimize some forms of setcond. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 50 +++ 1 file changed, 50 insertions(+) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index

[PULL 36/48] tcg/i386: Clear dest first in tcg_out_setcond if possible

Using XOR first is both smaller and more efficient, though cannot be applied if it clobbers an input. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/tcg/i386/tcg-targ

[PULL 25/48] tcg/ppc: Implement negsetcond_*

In the general case we simply negate. However with isel we may load -1 instead of 1 with no extra effort. Consolidate EQ0 and NE0 logic. Replace the NE0 zero-extension with inversion+negation of EQ0, which is never worse and may eliminate one insn. Provide a special case for -EQ0. Reviewed-by:

[PULL 08/48] accel/tcg: Widen address arg in tlb_compare_set()

From: Anton Johansson via Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-9-a...@rev.ng> Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cp

[PULL 04/48] sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint

From: Anton Johansson via Changes the signature of the target-defined functions for inserting/removing hvf hw breakpoints. The address and length arguments are now of vaddr type, which both matches the type used internally in accel/hvf/hvf-all.c and makes the api target-agnostic. Signed-off-by:

[PULL 10/48] target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/m68k/translate.c | 11 ++- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index e07161d76f..d08e823b6c 100644 --- a/target/m68k/translate.c +++

[PULL 31/48] tcg/sparc64: Implement negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.h | 4 ++-- tcg/sparc64/tcg-target.c.inc | 40 +++- 2 files changed, 32 insertions(+), 12 deletions(-) diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h ind

[PULL 05/48] include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*()

From: Anton Johansson via Changes the address type of the guest memory read/write functions from target_ulong to abi_ptr. (abi_ptr is currently typedef'd to target_ulong but that will change in a following commit.) This will reduce the coupling between accel/ and target/. Note: Function pointers

[PULL 14/48] docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32()

From: Philippe Mathieu-Daudé Commit 609ad70562 ("tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32") remove trunc_shr_i64_i32(). Update the backend documentation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230822162847.71206-1-phi...@linaro.org> Sig

[PULL 11/48] tcg/i386: Drop BYTEH deposits for 64-bit

It is more useful to allow low-part deposits into all registers than to restrict allocation for high-byte deposits. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target-con-set.h | 2 +- tcg/i386/tcg-target-con-str.h | 1 - tcg/i386/tcg-target.h | 4 ++--

[PULL 12/48] tcg: Fold deposit with zero to and

Inserting a zero into a value, or inserting a value into zero at offset 0 may be implemented with AND. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/optimize.c | 37 + 1 file changed, 37 insertions(+)

[PULL 09/48] accel/tcg: Update run_on_cpu_data static assert

From: Anton Johansson via As we are now using vaddr for representing guest addresses, update the static assert to check that vaddr fits in the run_on_cpu_data union. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-10-a...@rev.ng> Signed-off-by: Ri

[PULL 18/48] target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero

The setcond + neg + and sequence is a complex method of performing a conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/alpha/translate.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/tran

[PULL 33/48] tcg/i386: Merge tcg_out_setcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 24 +++- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/tcg/i386/tcg-t

[PULL 21/48] target/openrisc: Use tcg_gen_negsetcond_*

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/openrisc/translate.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index a86360d4f5..7c6f80daf1 100644

[PULL 34/48] tcg/i386: Merge tcg_out_movcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 28 +++- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/tcg/i386/t

[PULL 03/48] sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint

From: Anton Johansson via Changes the signature of the target-defined functions for inserting/removing kvm hw breakpoints. The address and length arguments are now of vaddr type, which both matches the type used internally in accel/kvm/kvm-all.c and makes the api target-agnostic. Signed-off-by:

[PULL 00/48] tcg patch queue

The following changes since commit b0dd9a7d6dd15a6898e9c585b521e6bec79b25aa: Open 8.2 development tree (2023-08-22 07:14:07 -0700) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230823 for you to fetch changes up to

Re: [PATCH v3 07/11] softmmu/physmem: Never return directories from file_ram_open()

On Wed, Aug 23, 2023 at 05:34:07PM +0200, David Hildenbrand wrote: > open() does not fail on directories when opening them readonly (O_RDONLY). > > Currently, we succeed opening such directories and fail later during > mmap(), resulting in a misleading error message. > > $ ./qemu-system-x86_64 \

Re: [PATCH v3 06/11] softmmu/physmem: Fail creation of new files in file_ram_open() with readonly=true

On Wed, Aug 23, 2023 at 05:34:06PM +0200, David Hildenbrand wrote: > Currently, if a file does not exist yet, file_ram_open() will create new > empty file and open it writable. However, it even does that when > readonly=true was specified. > > Specifying O_RDONLY instead to create a new readonly f

Re: [PATCH v3 04/11] softmmu/physmem: Remap with proper protection in qemu_ram_remap()

On Wed, Aug 23, 2023 at 05:34:04PM +0200, David Hildenbrand wrote: > Let's remap with the proper protection that we can derive from > RAM_READONLY. > > Signed-off-by: David Hildenbrand Reviewed-by: Peter Xu -- Peter Xu

Re: [PATCH v3 05/11] softmmu/physmem: Bail out early in ram_block_discard_range() with readonly files

On Wed, Aug 23, 2023 at 05:34:05PM +0200, David Hildenbrand wrote: > fallocate() will fail, let's print a nicer error message. > > Suggested-by: Peter Xu > Signed-off-by: David Hildenbrand Reviewed-by: Peter Xu -- Peter Xu

Re: [PATCH v3 02/11] softmmu/physmem: Distinguish between file access mode and mmap protection

On Wed, Aug 23, 2023 at 05:34:02PM +0200, David Hildenbrand wrote: > There is a difference between how we open a file and how we mmap it, > and we want to support writable private mappings of readonly files. Let's > define RAM_READONLY and RAM_READONLY_FD flags, to replace the single > "readonly" p

Re: [PATCH v2 1/4] softmmu: Support concurrent bounce buffers

Peter, thanks for taking a look and providing feedback! On Wed, Aug 23, 2023 at 7:35 PM Peter Xu wrote: > > On Wed, Aug 23, 2023 at 02:29:02AM -0700, Mattias Nissler wrote: > > When DMA memory can't be directly accessed, as is the case when > > running the device model in a separate process witho

Re: [PATCH 05/24] tcg: spelling fixes

On 8/23/23 01:30, Alex Bennée wrote: Michael Tokarev writes: Signed-off-by: Michael Tokarev Acked-by: Alex Bennée Queued this one patch to tcg-next. r~

Re: [PATCH] docs/devel/tcg-ops: fix missing newlines in "Host vector operations" section

On 8/23/23 07:56, Philippe Mathieu-Daudé wrote: On 23/8/23 16:17, Mark Cave-Ayland wrote: This unintentionally causes the mov_vec, ld_vec and st_vec operations to appear on the same line. Signed-off-by: Mark Cave-Ayland ---   docs/devel/tcg-ops.rst | 2 ++   1 file changed, 2 insertions(+) Re

Re: [PATCH v2 33/58] headers: Add definitions from UEFI spec for volumes, resources, etc...

On Fri, Aug 18, 2023 at 05:50:16AM -0400, Xiaoyao Li wrote: > Add UEFI definitions for literals, enums, structs, GUIDs, etc... that > will be used by TDX to build the UEFI Hand-Off Block (HOB) that is passed > to the Trusted Domain Virtual Firmware (TDVF). > > All values come from the UEFI speci

Re: [PATCH 21/24] scripts/: spelling fixes

23.08.2023 22:12, Michael Tokarev пишет: 23.08.2023 17:13, Alex Bennée wrote: Reviewed-by: Alex Bennée Alex, can I keep your R-b of this with the changes suggested by Eric? n/m, it's just me with too many patches, screwed up in multiple ways :) /mjt

Re: [PATCH 21/24] scripts/: spelling fixes

23.08.2023 17:13, Alex Bennée wrote: Reviewed-by: Alex Bennée Alex, can I keep your R-b of this with the changes suggested by Eric? Thank you for the review! /mjt

Re: [PATCH 24/24] misc/other: spelling fixes

23.08.2023 21:23, Eric Blake wrote: On Wed, Aug 23, 2023 at 09:53:35AM +0300, Michael Tokarev wrote: Signed-off-by: Michael Tokarev --- accel/tcg/tb-maint.c | 2 +- backends/tpm/tpm_ioctl.h | 2 +- chardev/char-socket.c | 6 +++--- chardev/char.c | 2 +- contrib/p

Re: [RFC PATCH 2/5] HACK: target/arm/tcg: Add some more caches to cpu=max

On 8/23/23 07:59, Jonathan Cameron via wrote: On Mon, 14 Aug 2023 11:13:58 +0100 Alex Bennée wrote: Jonathan Cameron writes: Used to drive the MPAM cache intialization and to exercise more of the PPTT cache entry generation code. Perhaps a default L3 cache is acceptable for max? Signed-off

Re: NVMe ZNS last zone size

On Wed, 23 Aug 2023 at 14:53, Klaus Jensen wrote: > > On Aug 23 22:58, Sam Li wrote: > > Stefan Hajnoczi 于2023年8月23日周三 22:41写道： > > > > > > On Wed, 23 Aug 2023 at 10:24, Sam Li wrote: > > > > > > > > Hi Stefan, > > > > > > > > Stefan Hajnoczi 于2023年8月23日周三 21:26写道： > > > > > > > > > > Hi Sam an

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