Re: [PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-28 Thread LIU Zhiwei
On 2020/3/28 9:22, Richard Henderson wrote: On 3/27/20 6:07 PM, LIU Zhiwei wrote: On 2020/3/28 8:32, Richard Henderson wrote: On 3/18/20 8:46 PM, LIU Zhiwei wrote: +static inline int32_t asub32(CPURISCVState *env, int vxrm, int32_t a, int32_t b) +{ +int64_t res = (int64_t)a - b; +

Re: [PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-27 Thread Richard Henderson
On 3/27/20 6:07 PM, LIU Zhiwei wrote: > > > On 2020/3/28 8:32, Richard Henderson wrote: >> On 3/18/20 8:46 PM, LIU Zhiwei wrote: >>> +static inline int32_t asub32(CPURISCVState *env, int vxrm, int32_t a, >>> int32_t b) >>> +{ >>> +int64_t res = (int64_t)a - b; >>> +uint8_t round = get_ro

Re: [PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-27 Thread LIU Zhiwei
On 2020/3/28 8:32, Richard Henderson wrote: On 3/18/20 8:46 PM, LIU Zhiwei wrote: +static inline int32_t asub32(CPURISCVState *env, int vxrm, int32_t a, int32_t b) +{ +int64_t res = (int64_t)a - b; +uint8_t round = get_round(vxrm, res, 1); + +return (res >> 1) + round; +} + I fin

Re: [PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-27 Thread Richard Henderson
On 3/18/20 8:46 PM, LIU Zhiwei wrote: > +static inline int32_t asub32(CPURISCVState *env, int vxrm, int32_t a, > int32_t b) > +{ > +int64_t res = (int64_t)a - b; > +uint8_t round = get_round(vxrm, res, 1); > + > +return (res >> 1) + round; > +} > + > > I find a corner case here.  As t

Re: [PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-18 Thread LIU Zhiwei
On 2020/3/17 23:06, LIU Zhiwei wrote: Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 17 target/riscv/insn32.decode | 5 ++ target/riscv/insn_trans/trans_rvv.inc.c | 7 ++ target/riscv/vector_helper.c| 100 4

[PATCH v6 25/61] target/riscv: vector single-width averaging add and subtract

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 17 target/riscv/insn32.decode | 5 ++ target/riscv/insn_trans/trans_rvv.inc.c | 7 ++ target/riscv/vector_helper.c| 100 4 files changed, 129 insertions(+) diff --