Re: [PATCH v6 59/61] target/riscv: vector register gather instruction
On 3/17/20 8:06 AM, LIU Zhiwei wrote: > Signed-off-by: LIU Zhiwei > --- > target/riscv/helper.h | 9 ++ > target/riscv/insn32.decode | 3 + > target/riscv/insn_trans/trans_rvv.inc.c | 127 > target/riscv/vector_helper.c| 64
[PATCH v6 59/61] target/riscv: vector register gather instruction
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 9 ++ target/riscv/insn32.decode | 3 + target/riscv/insn_trans/trans_rvv.inc.c | 127 target/riscv/vector_helper.c| 64 4 files changed, 203 insertions(+)