Richard Henderson writes:
> On 07/12/2016 11:33 PM, Nikunj A Dadhania wrote:
>> +static void gen_addpcis(DisasContext *ctx)
>> +{
>> +target_long d = DX(ctx->opcode);
>> +
>> +tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], ctx->nip);
>> +tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD
On 07/12/2016 11:33 PM, Nikunj A Dadhania wrote:
+static void gen_addpcis(DisasContext *ctx)
+{
+target_long d = DX(ctx->opcode);
+
+tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], ctx->nip);
+tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)], d);
+}
(1) You appear to hav
On Tue, Jul 12, 2016 at 11:33:19PM +0530, Nikunj A Dadhania wrote:
> ISA 3.0 instruction for adding immediate value with next instruction
> address and return the result in the target register.
>
> Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
> ---
> target-ppc/translate.c | 27
ISA 3.0 instruction for adding immediate value with next instruction
address and return the result in the target register.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/target-ppc/translate.c b/target-
