Re: [PATCH 17/48] hw/arm/xlnx-versal: rtc: refactor creation

2025-07-29 Thread Francisco Iglesias 
On Wed, Jul 16, 2025 at 11:53:59AM +0200, Luc Michel wrote:
> Refactor the RTC device creation using the VersalMap structure.
> 
> The sysbus IRQ output 0 (APB IRQ) is connected instead of the output 1
> (addr error IRQ). This does not change the current behaviour since the
> RTC model does not implement those IRQs anyway.
> 
> Signed-off-by: Luc Michel 

Reviewed-by: Francisco Iglesias 

> ---
>  include/hw/arm/xlnx-versal.h |  2 --
>  hw/arm/xlnx-versal-virt.c| 22 
>  hw/arm/xlnx-versal.c | 40 
>  3 files changed, 31 insertions(+), 33 deletions(-)
> 
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index bba96201d37..abdbed15689 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -15,11 +15,10 @@
>  
>  #include "hw/sysbus.h"
>  #include "hw/cpu/cluster.h"
>  #include "hw/or-irq.h"
>  #include "hw/intc/arm_gicv3.h"
> -#include "hw/rtc/xlnx-zynqmp-rtc.h"
>  #include "qom/object.h"
>  #include "hw/misc/xlnx-versal-crl.h"
>  #include "net/can_emu.h"
>  #include "hw/misc/xlnx-versal-cfu.h"
>  #include "hw/misc/xlnx-versal-cframe-reg.h"
> @@ -79,11 +78,10 @@ struct Versal {
>  XlnxVersalCRL crl;
>  } lpd;
>  
>  /* The Platform Management Controller subsystem.  */
>  struct {
> -XlnxZynqMPRTC rtc;
>  XlnxVersalCFUAPB cfu_apb;
>  XlnxVersalCFUFDRO cfu_fdro;
>  XlnxVersalCFUSFR cfu_sfr;
>  XlnxVersalCFrameReg cframe[XLNX_VERSAL_NR_CFRAME];
>  XlnxVersalCFrameBcastReg cframe_bcast;
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index 2d7e8a5955a..01c230491df 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -149,31 +149,10 @@ static void fdt_add_timer_nodes(VersalVirt *s)
>  GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_IRQ, irqflags);
>  qemu_fdt_setprop(s->fdt, "/timer", "compatible",
>   compat, sizeof(compat));
>  }
>  
> -static void fdt_add_rtc_node(VersalVirt *s)
> -{
> -const char compat[] = "xlnx,zynqmp-rtc";
> -const char interrupt_names[] = "alarm\0sec";
> -char *name = g_strdup_printf("/rtc@%x", MM_PMC_RTC);
> -
> -qemu_fdt_add_subnode(s->fdt, name);
> -
> -qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
> -   GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_ALARM_IRQ,
> -   GIC_FDT_IRQ_FLAGS_LEVEL_HI,
> -   GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_SECONDS_IRQ,
> -   GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> -qemu_fdt_setprop(s->fdt, name, "interrupt-names",
> - interrupt_names, sizeof(interrupt_names));
> -qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> - 2, MM_PMC_RTC, 2, MM_PMC_RTC_SIZE);
> -qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> -g_free(name);
> -}
> -
>  static void fdt_nop_memory_nodes(void *fdt, Error **errp)
>  {
>  Error *err = NULL;
>  char **node_path;
>  int n = 0;
> @@ -421,11 +400,10 @@ static void versal_virt_init(MachineState *machine)
>  
>  fdt_create(s);
>  versal_set_fdt(&s->soc, s->fdt);
>  fdt_add_gic_nodes(s);
>  fdt_add_timer_nodes(s);
> -fdt_add_rtc_node(s);
>  fdt_add_cpu_nodes(s, psci_conduit);
>  fdt_add_clk_node(s, "/old-clk125", 12500, s->phandle.clk_125Mhz);
>  fdt_add_clk_node(s, "/old-clk25", 2500, s->phandle.clk_25Mhz);
>  
>  sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 45d9fc1e282..41965531f8d 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -36,10 +36,11 @@
>  #include "hw/nvram/xlnx-versal-efuse.h"
>  #include "hw/ssi/xlnx-versal-ospi.h"
>  #include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
>  #include "hw/nvram/xlnx-bbram.h"
>  #include "hw/misc/xlnx-versal-trng.h"
> +#include "hw/rtc/xlnx-zynqmp-rtc.h"
>  
>  #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
>  #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
>  #define GEM_REVISION0x40070106
>  
> @@ -121,10 +122,16 @@ typedef struct VersalMap {
>  } ospi;
>  
>  VersalSimplePeriphMap pmc_iou_slcr;
>  VersalSimplePeriphMap bbram;
>  VersalSimplePeriphMap trng;
> +
> +struct VersalRtcMap {
> +VersalSimplePeriphMap map;
> +int alarm_irq;
> +int second_irq;
> +} rtc;
>  } VersalMap;
>  
>  static const VersalMap VERSAL_MAP = {
>  .uart[0] = { 0xff00, 18 },
>  .uart[1] = { 0xff01, 19 },
> @@ -165,10 +172,14 @@ static const VersalMap VERSAL_MAP = {
>  },
>  
>  .pmc_iou_slcr = { 0xf106, OR_IRQ(121, 0) },
>  .bbram = { 0xf11f, OR_IRQ(121, 1) },
>  .trng = { 0xf123, 141 },
> +.rtc = {
> +{ 0xf12a, OR_IRQ(121, 2) },
> +.alarm_irq = 142, .second_irq = 143
> +

[PATCH 17/48] hw/arm/xlnx-versal: rtc: refactor creation

2025-07-16 Thread Luc Michel 
Refactor the RTC device creation using the VersalMap structure.

The sysbus IRQ output 0 (APB IRQ) is connected instead of the output 1
(addr error IRQ). This does not change the current behaviour since the
RTC model does not implement those IRQs anyway.

Signed-off-by: Luc Michel 
---
 include/hw/arm/xlnx-versal.h |  2 --
 hw/arm/xlnx-versal-virt.c| 22 
 hw/arm/xlnx-versal.c | 40 
 3 files changed, 31 insertions(+), 33 deletions(-)

diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index bba96201d37..abdbed15689 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -15,11 +15,10 @@
 
 #include "hw/sysbus.h"
 #include "hw/cpu/cluster.h"
 #include "hw/or-irq.h"
 #include "hw/intc/arm_gicv3.h"
-#include "hw/rtc/xlnx-zynqmp-rtc.h"
 #include "qom/object.h"
 #include "hw/misc/xlnx-versal-crl.h"
 #include "net/can_emu.h"
 #include "hw/misc/xlnx-versal-cfu.h"
 #include "hw/misc/xlnx-versal-cframe-reg.h"
@@ -79,11 +78,10 @@ struct Versal {
 XlnxVersalCRL crl;
 } lpd;
 
 /* The Platform Management Controller subsystem.  */
 struct {
-XlnxZynqMPRTC rtc;
 XlnxVersalCFUAPB cfu_apb;
 XlnxVersalCFUFDRO cfu_fdro;
 XlnxVersalCFUSFR cfu_sfr;
 XlnxVersalCFrameReg cframe[XLNX_VERSAL_NR_CFRAME];
 XlnxVersalCFrameBcastReg cframe_bcast;
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 2d7e8a5955a..01c230491df 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -149,31 +149,10 @@ static void fdt_add_timer_nodes(VersalVirt *s)
 GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_IRQ, irqflags);
 qemu_fdt_setprop(s->fdt, "/timer", "compatible",
  compat, sizeof(compat));
 }
 
-static void fdt_add_rtc_node(VersalVirt *s)
-{
-const char compat[] = "xlnx,zynqmp-rtc";
-const char interrupt_names[] = "alarm\0sec";
-char *name = g_strdup_printf("/rtc@%x", MM_PMC_RTC);
-
-qemu_fdt_add_subnode(s->fdt, name);
-
-qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
-   GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_ALARM_IRQ,
-   GIC_FDT_IRQ_FLAGS_LEVEL_HI,
-   GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_SECONDS_IRQ,
-   GIC_FDT_IRQ_FLAGS_LEVEL_HI);
-qemu_fdt_setprop(s->fdt, name, "interrupt-names",
- interrupt_names, sizeof(interrupt_names));
-qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
- 2, MM_PMC_RTC, 2, MM_PMC_RTC_SIZE);
-qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
-g_free(name);
-}
-
 static void fdt_nop_memory_nodes(void *fdt, Error **errp)
 {
 Error *err = NULL;
 char **node_path;
 int n = 0;
@@ -421,11 +400,10 @@ static void versal_virt_init(MachineState *machine)
 
 fdt_create(s);
 versal_set_fdt(&s->soc, s->fdt);
 fdt_add_gic_nodes(s);
 fdt_add_timer_nodes(s);
-fdt_add_rtc_node(s);
 fdt_add_cpu_nodes(s, psci_conduit);
 fdt_add_clk_node(s, "/old-clk125", 12500, s->phandle.clk_125Mhz);
 fdt_add_clk_node(s, "/old-clk25", 2500, s->phandle.clk_25Mhz);
 
 sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 45d9fc1e282..41965531f8d 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -36,10 +36,11 @@
 #include "hw/nvram/xlnx-versal-efuse.h"
 #include "hw/ssi/xlnx-versal-ospi.h"
 #include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
 #include "hw/nvram/xlnx-bbram.h"
 #include "hw/misc/xlnx-versal-trng.h"
+#include "hw/rtc/xlnx-zynqmp-rtc.h"
 
 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
 #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
 #define GEM_REVISION0x40070106
 
@@ -121,10 +122,16 @@ typedef struct VersalMap {
 } ospi;
 
 VersalSimplePeriphMap pmc_iou_slcr;
 VersalSimplePeriphMap bbram;
 VersalSimplePeriphMap trng;
+
+struct VersalRtcMap {
+VersalSimplePeriphMap map;
+int alarm_irq;
+int second_irq;
+} rtc;
 } VersalMap;
 
 static const VersalMap VERSAL_MAP = {
 .uart[0] = { 0xff00, 18 },
 .uart[1] = { 0xff01, 19 },
@@ -165,10 +172,14 @@ static const VersalMap VERSAL_MAP = {
 },
 
 .pmc_iou_slcr = { 0xf106, OR_IRQ(121, 0) },
 .bbram = { 0xf11f, OR_IRQ(121, 1) },
 .trng = { 0xf123, 141 },
+.rtc = {
+{ 0xf12a, OR_IRQ(121, 2) },
+.alarm_irq = 142, .second_irq = 143
+},
 };
 
 static const VersalMap *VERSION_TO_MAP[] = {
 [VERSAL_VER_VERSAL] = &VERSAL_MAP,
 };
@@ -753,29 +764,40 @@ static void versal_create_pmc_apb_irq_orgate(Versal *s, 
qemu_irq *pic)
 "num-lines", VERSAL_NUM_PMC_APB_IRQS, 
&error_fatal);
 qdev_realize(orgate, NULL, &error_fatal);
 qdev_connect_gpio_out(orgate,