Re: [PATCH v11 14/24] target/mips: add Octeon SAAD instruction

2026-05-20 Thread Philippe Mathieu-Daudé 

On 20/5/26 12:17, Philippe Mathieu-Daudé wrote:

From: James Hilliard 

SAAD is the doubleword form of SAA: it atomically adds rt to the
naturally aligned 64-bit doubleword at base and discards the old memory
value.

Route it through the common SAA/SAAD translator so the MemOp selects the
aligned doubleword transaction size.

Reviewed-by: Richard Henderson 
Signed-off-by: James Hilliard 
Signed-off-by: Philippe Mathieu-Daudé 
---
  target/mips/tcg/octeon.decode  | 1 +
  target/mips/tcg/octeon_translate.c | 1 +
  2 files changed, 2 insertions(+)


Reviewed-by: Philippe Mathieu-Daudé

[PATCH v11 14/24] target/mips: add Octeon SAAD instruction

2026-05-20 Thread Philippe Mathieu-Daudé 
From: James Hilliard 

SAAD is the doubleword form of SAA: it atomically adds rt to the
naturally aligned 64-bit doubleword at base and discards the old memory
value.

Route it through the common SAA/SAAD translator so the MemOp selects the
aligned doubleword transaction size.

Reviewed-by: Richard Henderson 
Signed-off-by: James Hilliard 
Signed-off-by: Philippe Mathieu-Daudé 
---
 target/mips/tcg/octeon.decode  | 1 +
 target/mips/tcg/octeon_translate.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode
index d6b241de421..d77717cd507 100644
--- a/target/mips/tcg/octeon.decode
+++ b/target/mips/tcg/octeon.decode
@@ -47,6 +47,7 @@ SNEI 011100 rs:5 rt:5 imm:s10 10 &cmpi
 &saa base rt
 @saa .. base:5 rt:5  &saa
 SAA  011100 . . 0 0 011000 @saa
+SAAD 011100 . . 0 0 011001 @saa
 
 &lx  base index rd
 @lx  .. base:5 index:5 rd:5 .. . &lx
diff --git a/target/mips/tcg/octeon_translate.c 
b/target/mips/tcg/octeon_translate.c
index f00692830a9..d3dfef2e0c9 100644
--- a/target/mips/tcg/octeon_translate.c
+++ b/target/mips/tcg/octeon_translate.c
@@ -175,6 +175,7 @@ static bool trans_saa(DisasContext *ctx, arg_saa *a, MemOp 
mop)
 }
 
 TRANS(SAA,  trans_saa, MO_32);
+TRANS(SAAD, trans_saa, MO_64);
 TRANS(LBX,  trans_lx, MO_SB);
 TRANS(LBUX, trans_lx, MO_UB);
 TRANS(LHX,  trans_lx, MO_SW);
-- 
2.53.0