On Thu, May 22, 2025 at 6:14 PM Jay Chang wrote:
>
> The first patch extends the number of PMP regions supported up to 64,
> following the RISC-V Privileged Specification (version >1.12), where
> RV32 can have up to 64 PMP regions configured through 16 CSRs.
>
> The second patch makes the PMP region count configurable via a new
> CPU parameter `num-pmp-regions`. This allows platforms to adjust
> the number of PMP regions without relying on a fixed default value.
> If unspecified, the default remains 16 to preserve compatibility.
>
> Change log:
> V4:
> * Changed `pmp_regions` type from `uint16_t` to `uint8_t`
> * Introduced `OLD_MAX_RISCV_PMPS` macro
>
> Jay Chang (2):
> target/riscv: Extend PMP region up to 64
> target/riscv: Make PMP region count configurable
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> target/riscv/cpu.c| 54 -
> target/riscv/cpu.h| 3 +-
> target/riscv/cpu_bits.h | 60 ++
> target/riscv/cpu_cfg_fields.h.inc | 1 +
> target/riscv/csr.c| 129 +-
> target/riscv/machine.c| 3 +-
> target/riscv/pmp.c| 28 ---
> 7 files changed, 262 insertions(+), 16 deletions(-)
>
> --
> 2.48.1
>
>
