Re: [PATCH v9 1/7] target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks

[Chao Liu]

On Mon, May 11, 2026 at 08:38:27AM +, Djordje Todorovic wrote:
> Add the RISC-V privileged ISA defined bit positions for the Supervisor
> Big-Endian (SBE, bit 36) and Machine Big-Endian (MBE, bit 37) fields
> in the mstatus register. These are used alongside the existing
> MSTATUS_UBE (bit 6) to control data endianness at each privilege level.
> 
> The MSTATUS_UBE definition was already present, but SBE and MBE were
> missing.
> 
> Signed-off-by: Djordje Todorovic 
> Reviewed-by: Philippe Mathieu-Daudé 
> Reviewed-by: Alistair Francis 
Reviewed-by: Chao Liu 

Thanks,
Chao
> ---
>  target/riscv/cpu_bits.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index b62dd82fe7..c2a3ee4bf3 100644
> --- a/target/riscv/cpu_bits.h
> +++ b/target/riscv/cpu_bits.h
> @@ -628,6 +628,8 @@
>  #define MSTATUS_TSR 0x0040 /* since: priv-1.10 */
>  #define MSTATUS_SPELP   0x0080 /* zicfilp */
>  #define MSTATUS_SDT 0x0100
> +#define MSTATUS_SBE 0x10ULL
> +#define MSTATUS_MBE 0x20ULL
>  #define MSTATUS_MPELP   0x0200 /* zicfilp */
>  #define MSTATUS_GVA 0x40ULL
>  #define MSTATUS_MPV 0x80ULL
> -- 
> 2.34.1

[PATCH v9 1/7] target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks

[Djordje Todorovic]

Add the RISC-V privileged ISA defined bit positions for the Supervisor
Big-Endian (SBE, bit 36) and Machine Big-Endian (MBE, bit 37) fields
in the mstatus register. These are used alongside the existing
MSTATUS_UBE (bit 6) to control data endianness at each privilege level.

The MSTATUS_UBE definition was already present, but SBE and MBE were
missing.

Signed-off-by: Djordje Todorovic 
Reviewed-by: Philippe Mathieu-Daudé 
Reviewed-by: Alistair Francis 
---
 target/riscv/cpu_bits.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index b62dd82fe7..c2a3ee4bf3 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -628,6 +628,8 @@
 #define MSTATUS_TSR 0x0040 /* since: priv-1.10 */
 #define MSTATUS_SPELP   0x0080 /* zicfilp */
 #define MSTATUS_SDT 0x0100
+#define MSTATUS_SBE 0x10ULL
+#define MSTATUS_MBE 0x20ULL
 #define MSTATUS_MPELP   0x0200 /* zicfilp */
 #define MSTATUS_GVA 0x40ULL
 #define MSTATUS_MPV 0x80ULL
-- 
2.34.1