Re: [PATCH v9 26/45] target/arm: Implement MOVT (vector to table)

2026-06-09 Thread Peter Maydell
On Wed, 3 Jun 2026 at 04:30, Richard Henderson
 wrote:
>
> Signed-off-by: Richard Henderson 
> ---

Reviewed-by: Peter Maydell 

thanks
-- PMM



[PATCH v9 26/45] target/arm: Implement MOVT (vector to table)

2026-06-02 Thread Richard Henderson
Signed-off-by: Richard Henderson 
---
 target/arm/cpu-features.h  |  5 +
 target/arm/tcg/translate-sme.c | 18 ++
 target/arm/tcg/sme.decode  |  2 ++
 3 files changed, 25 insertions(+)

diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index 3a754f8d61..050a826849 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -1580,6 +1580,11 @@ static inline bool isar_feature_aa64_sme_fa64(const 
ARMISARegisters *id)
 return FIELD_EX64_IDREG(id, ID_AA64SMFR0, FA64);
 }
 
+static inline bool isar_feature_aa64_sme_lutv2(const ARMISARegisters *id)
+{
+return FIELD_EX64_IDREG(id, ID_AA64SMFR0, LUTv2);
+}
+
 static inline bool isar_feature_aa64_sme2(const ARMISARegisters *id)
 {
 return FIELD_EX64_IDREG(id, ID_AA64SMFR0, SMEVER) != 0;
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index 76bbacfb6e..c4bede2ae3 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -391,6 +391,24 @@ static bool do_movt(DisasContext *s, arg_MOVT_rzt *a,
 TRANS_FEAT(MOVT_rzt, aa64_sme2, do_movt, a, tcg_gen_ld_i64)
 TRANS_FEAT(MOVT_ztr, aa64_sme2, do_movt, a, tcg_gen_st_i64)
 
+static bool trans_MOVT_ztz(DisasContext *s, arg_MOVT_ztz *a)
+{
+if (!dc_isar_feature(aa64_sme_lutv2, s)) {
+return false;
+}
+if (sme_sm_enabled_check(s) && sme2_zt0_enabled_check(s)) {
+int svl = streaming_vec_reg_size(s);
+int tsize = MIN(svl, 64);
+int offset = (a->off % (64 / tsize)) * tsize;
+
+tcg_gen_gvec_mov(MO_64,
+ offsetof(CPUARMState, za_state.zt0) + offset,
+ vec_full_reg_offset(s, a->rt), tsize,
+ offset ? tsize : 64);
+}
+return true;
+}
+
 static bool trans_LDST1(DisasContext *s, arg_LDST1 *a)
 {
 typedef void GenLdSt1(TCGv_env, TCGv_ptr, TCGv_ptr, TCGv, TCGv_i64);
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 2b9e41a75a..339de72b8a 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -141,6 +141,8 @@ MOVAZ_zt4   1100 11 00011 0 v:1 .. 00110 za:3 zr:3 
00 \
 MOVT_rzt1100  0100 1100 0 off:3 00 1 rt:5
 MOVT_ztr1100  0100 1110 0 off:3 00 1 rt:5
 
+MOVT_ztz1100  0100  00 off:2 00 1 rt:5
+
 ### SME Memory
 
 &ldst   esz rs pg rn rm za off v:bool st:bool
-- 
2.43.0