Re: [PATCH v9 36/45] target/arm: Enable FEAT_FP8DOT4, FEAT_SSVE_FP8DOT4 for -cpu max

2026-06-09 Thread Peter Maydell
On Wed, 3 Jun 2026 at 04:31, Richard Henderson
 wrote:
>
> Signed-off-by: Richard Henderson 
> ---
>  linux-user/aarch64/elfload.c  | 2 ++
>  target/arm/tcg/cpu64.c| 2 ++
>  docs/system/arm/emulation.rst | 2 ++
>  3 files changed, 6 insertions(+)

Reviewed-by: Peter Maydell 

thanks
-- PMM



[PATCH v9 36/45] target/arm: Enable FEAT_FP8DOT4, FEAT_SSVE_FP8DOT4 for -cpu max

2026-06-02 Thread Richard Henderson
Signed-off-by: Richard Henderson 
---
 linux-user/aarch64/elfload.c  | 2 ++
 target/arm/tcg/cpu64.c| 2 ++
 docs/system/arm/emulation.rst | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c
index a82d65a681..be33fede6b 100644
--- a/linux-user/aarch64/elfload.c
+++ b/linux-user/aarch64/elfload.c
@@ -227,7 +227,9 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
ARM_HWCAP2_A64_F8E4M3 |
ARM_HWCAP2_A64_F8E5M2);
 GET_FEATURE_ID(aa64_f8fma, ARM_HWCAP2_A64_F8FMA);
+GET_FEATURE_ID(aa64_f8dp4, ARM_HWCAP2_A64_F8DP4);
 GET_FEATURE_ID(aa64_ssve_f8fma, ARM_HWCAP2_A64_SME_SF8FMA);
+GET_FEATURE_ID(aa64_ssve_f8dp4, ARM_HWCAP2_A64_SME_SF8DP4);
 
 return hwcaps;
 }
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index 6ad841c51b..1e2d1311b9 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1378,6 +1378,7 @@ void aarch64_max_tcg_initfn(Object *obj)
 SET_IDREG(isar, ID_AA64DFR0, t);
 
 t = GET_IDREG(isar, ID_AA64SMFR0);
+t = FIELD_DP64(t, ID_AA64SMFR0, SF8DP4, 1);   /* FEAT_SSVE_FP8DOT4 */
 t = FIELD_DP64(t, ID_AA64SMFR0, SF8FMA, 1);   /* FEAT_SSVE_FP8FMA */
 t = FIELD_DP64(t, ID_AA64SMFR0, F32F32, 1);   /* FEAT_SME */
 t = FIELD_DP64(t, ID_AA64SMFR0, BI32I32, 1);  /* FEAT_SME2 */
@@ -1397,6 +1398,7 @@ void aarch64_max_tcg_initfn(Object *obj)
 t = GET_IDREG(isar, ID_AA64FPFR0);
 t = FIELD_DP64(t, ID_AA64FPFR0, F8E5M2, 1);   /* FEAT_FP8 */
 t = FIELD_DP64(t, ID_AA64FPFR0, F8E4M3, 1);   /* FEAT_FP8 */
+t = FIELD_DP64(t, ID_AA64FPFR0, F8DP4, 1);/* FEAT_FP8DOT4 */
 t = FIELD_DP64(t, ID_AA64FPFR0, F8FMA, 1);/* FEAT_FP8FMA */
 t = FIELD_DP64(t, ID_AA64FPFR0, F8CVT, 1);/* FEAT_FP8 */
 SET_IDREG(isar, ID_AA64FPFR0, t);
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 78d1938656..8d786f9dae 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -76,6 +76,7 @@ the following architecture extensions:
 - FEAT_FP (Floating Point extensions)
 - FEAT_FP16 (Half-precision floating-point data processing)
 - FEAT_FP8 (FP8 convert instructions)
+- FEAT_FP8DOT4 (FP8 4-way dot product to single-precision instructions)
 - FEAT_FP8FMA (FP8 multiply-accumulate to half-precision and single-precision 
instructions)
 - FEAT_FPAC (Faulting on AUT* instructions)
 - FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions)
@@ -162,6 +163,7 @@ the following architecture extensions:
 - FEAT_SME_F64F64 (Double-precision floating-point outer product instructions)
 - FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product 
instructions)
 - FEAT_SME_LUTv2 (Lookup table instructions with 4-bit indices and 8-bit 
elements)
+- FEAT_SSVE_FP8DOT4 (SVE2 FP8 4-way dot product to single-precision 
instructions in Streaming SVE mode)
 - FEAT_SSVE_FP8FMA (SVE2 FP8 multiply-accumulate to half-precision and 
single-precision instructions in Streaming SVE mode)
 - FEAT_SVE (Scalable Vector Extension)
 - FEAT_SVE_AES (Scalable Vector AES instructions)
-- 
2.43.0