It enables emulation of USB on iMX8MM
Enables testing and debugging of USB drivers
Signed-off-by: Gaurav Sharma
---
docs/system/arm/imx8mm-evk.rst | 1 +
hw/arm/Kconfig | 1 +
hw/arm/fsl-imx8mm.c| 27 +++
include/hw/arm/fsl-imx8mm.h| 6 ++
4 files changed, 35 insertions(+)
diff --git a/docs/system/arm/imx8mm-evk.rst b/docs/system/arm/imx8mm-evk.rst
index c8445099e8..f9fbc7b054 100644
--- a/docs/system/arm/imx8mm-evk.rst
+++ b/docs/system/arm/imx8mm-evk.rst
@@ -15,6 +15,7 @@ The ``imx8mm-evk`` machine implements the following devices:
* 3 USDHC Storage Controllers
* 1 Designware PCI Express Controller
* 1 Ethernet Controller
+ * 2 Designware USB 3 Controllers
* 5 GPIO Controllers
* 6 I2C Controllers
* 3 SPI Controllers
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index d41d03d728..39c63a3aea 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -640,6 +640,7 @@ config FSL_IMX8MM
select SDHCI
select PCI_EXPRESS_DESIGNWARE
select PCI_EXPRESS_FSL_IMX8M_PHY
+select USB_DWC3
select WDT_IMX2
config FSL_IMX8MM_EVK
diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
index 7be0bb8664..ea17d1f48b 100644
--- a/hw/arm/fsl-imx8mm.c
+++ b/hw/arm/fsl-imx8mm.c
@@ -199,6 +199,11 @@ static void fsl_imx8mm_init(Object *obj)
object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC);
}
+for (i = 0; i < FSL_IMX8MM_NUM_USBS; i++) {
+g_autofree char *name = g_strdup_printf("usb%d", i);
+object_initialize_child(obj, name, &s->usb[i], TYPE_USB_DWC3);
+}
+
for (i = 0; i < FSL_IMX8MM_NUM_ECSPIS; i++) {
g_autofree char *name = g_strdup_printf("spi%d", i + 1);
object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI);
@@ -514,6 +519,27 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error
**errp)
qdev_get_gpio_in(gicdev, usdhc_table[i].irq));
}
+/* USBs */
+for (i = 0; i < FSL_IMX8MM_NUM_USBS; i++) {
+static const struct {
+hwaddr addr;
+unsigned int irq;
+} usb_table[FSL_IMX8MM_NUM_USBS] = {
+{ fsl_imx8mm_memmap[FSL_IMX8MM_USB1].addr, FSL_IMX8MM_USB1_IRQ },
+{ fsl_imx8mm_memmap[FSL_IMX8MM_USB2].addr, FSL_IMX8MM_USB2_IRQ },
+};
+
+qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "p2", 1);
+qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "p3", 1);
+qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "slots", 2);
+if (!sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), errp)) {
+return;
+}
+sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr);
+sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 0,
+ qdev_get_gpio_in(gicdev, usb_table[i].irq));
+}
+
/* ECSPIs */
for (i = 0; i < FSL_IMX8MM_NUM_ECSPIS; i++) {
static const struct {
@@ -618,6 +644,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error
**errp)
case FSL_IMX8MM_RAM:
case FSL_IMX8MM_SNVS_HP:
case FSL_IMX8MM_UART1 ... FSL_IMX8MM_UART4:
+case FSL_IMX8MM_USB1 ... FSL_IMX8MM_USB2:
case FSL_IMX8MM_USDHC1 ... FSL_IMX8MM_USDHC3:
case FSL_IMX8MM_WDOG1 ... FSL_IMX8MM_WDOG3:
/* device implemented and treated above */
diff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h
index 356627ab82..6a0b911acf 100644
--- a/include/hw/arm/fsl-imx8mm.h
+++ b/include/hw/arm/fsl-imx8mm.h
@@ -24,6 +24,7 @@
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "hw/timer/imx_gpt.h"
+#include "hw/usb/hcd-dwc3.h"
#include "hw/watchdog/wdt_imx2.h"
#include "qom/object.h"
#include "qemu/units.h"
@@ -42,6 +43,7 @@ enum FslImx8mmConfiguration {
FSL_IMX8MM_NUM_I2CS = 4,
FSL_IMX8MM_NUM_IRQS = 128,
FSL_IMX8MM_NUM_UARTS= 4,
+FSL_IMX8MM_NUM_USBS = 2,
FSL_IMX8MM_NUM_USDHCS = 3,
FSL_IMX8MM_NUM_WDTS = 3,
};
@@ -62,6 +64,7 @@ struct FslImx8mmState {
IMXFECStateenet;
SDHCIState usdhc[FSL_IMX8MM_NUM_USDHCS];
IMX2WdtState wdt[FSL_IMX8MM_NUM_WDTS];
+USBDWC3usb[FSL_IMX8MM_NUM_USBS];
DesignwarePCIEHost pcie;
FslImx8mPciePhyState pcie_phy;
OrIRQState gpt5_gpt6_irq;
@@ -200,6 +203,9 @@ enum FslImx8mmIrqs {
FSL_IMX8MM_I2C3_IRQ = 37,
FSL_IMX8MM_I2C4_IRQ = 38,
+FSL_IMX8MM_USB1_IRQ = 40,
+FSL_IMX8MM_USB2_IRQ = 41,
+
FSL_IMX8MM_GPT1_IRQ = 55,
FSL_IMX8MM_GPT2_IRQ = 54,
FSL_IMX8MM_GPT3_IRQ = 53,
--
2.34.1
