The following changes since commit 282771e1f9b9b6e0147adf5f9d676325175b1767:
Merge tag 'pull-riscv-to-apply-20260429-1' of
https://github.com/alistair23/qemu into staging (2026-04-29 09:22:51 -0400)
are available in the Git repository at:
https://gitlab.com/harshpb/qemu.git tags/pull-ppc-for-11.1-20260429
for you to fetch changes up to 1aee8067fce95d15061eca8fbb6772d8a90ea699:
hw/intc/xics: Add a check for an invalid server id (2026-04-29 22:51:06 +0530)
PPC PR for 11.1
* MPIPL support for PowerNV
* ppc/pnv: Add a nest MMU model
* hw/ssi/pnv_spi: Fix fifo8 memory leak on unrealize
* hw/intc/xics: Add a check for an invalid server id
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Aditya Gupta (10):
ppc/pnv: Move SBE host doorbell function to top of file
ppc/mpipl: Implement S0 SBE interrupt
ppc/pnv: Handle stash command in PowerNV SBE
pnv/mpipl: Preserve memory regions as per MDST/MDDT tables
pnv/mpipl: Preserve CPU registers after crash
pnv/mpipl: Set thread entry size to be allocated by firmware
pnv/mpipl: Write the preserved CPU and MDRT state
pnv/mpipl: Enable MPIPL support
tests/functional: Add test for MPIPL in PowerNV
MAINTAINERS: Add entry for MPIPL (PowerNV)
Caleb Schlossin (2):
hw/ssi/pnv_spi: Fix fifo8 memory leak on unrealize
ppc/pnv: Add a nest MMU model
kiki (1):
hw/intc/xics: Add a check for an invalid server id
MAINTAINERS | 9 +
include/hw/ppc/pnv.h | 6 +
include/hw/ppc/pnv_chip.h | 3 +
include/hw/ppc/pnv_mpipl.h| 168
include/hw/ppc/pnv_nmmu.h | 28 ++
include/hw/ppc/pnv_xscom.h| 4 +
hw/intc/xics.c| 8 +
hw/ppc/pnv.c | 128 -
hw/ppc/pnv_mpipl.c| 482 ++
hw/ppc/pnv_nmmu.c | 132 ++
hw/ppc/pnv_sbe.c | 85 +-
hw/ssi/pnv_spi.c | 8 +
hw/ppc/meson.build| 2 +
tests/functional/ppc64/test_fadump.py | 35 +--
14 files changed, 1066 insertions(+), 32 deletions(-)
create mode 100644 include/hw/ppc/pnv_mpipl.h
create mode 100644 include/hw/ppc/pnv_nmmu.h
create mode 100644 hw/ppc/pnv_mpipl.c
create mode 100644 hw/ppc/pnv_nmmu.c
