On Tue, Apr 18, 2017 at 10:20:16AM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This is a resend of my Allwinner R40 SoC support series v2.
> This is rebased on v2017.05-rc2. Maxime's ack for the first
> two patches have been added, and the defconfig has been
> regenerated which moved the CONFIG_
fyi , a v3 has been send
On 03/22/2017 10:54 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This series adds :
> _ add reset driver
> _ update existing sdhci driver to use reset framework
> _ add usb phy driver
> _ add ehci support
> _ add ohci support
Hi Andreas:
On 2017年04月21日 10:59, Andreas Färber wrote:
Hi Andy,
Sorry for forgetting about this, and thank you for picking it up.
Am 21.04.2017 um 04:32 schrieb Andy Yan:
From: Andreas Färber
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with bas
Hello Ayoub,
Am 20.04.2017 um 16:35 schrieb ayoub.z...@embexus.com:
Hi Andy,
Thanks for the answer, I figured out what the problem is, in the fact I was
using a zImage, using an uImage format solve the problem :-)
It should maybe added to the documentation ;-)
Patches are welcome!
;-)
bye,
Am 21.04.2017 um 01:23 schrieb Andreas Färber:
> Hi,
>
> Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
> not into full U-Boot. I am using the old documented way of dd'ing to
> sector 256 on SD (doc/README.rockchip).
>
> Looking at include/configs/rk3288_common.h I also tri
Hi Franklin,
On Thursday 20 April 2017 08:55 PM, Franklin S Cooper Jr wrote:
> This patch series converts the davinci i2c driver to use device model.
> This updated driver has been verified on both Keystone K2G and Keystone
> K2L evms by performing several i2c operations in U-boot prompt.
>
> Som
ok - -wrong title.. It's Add Basic support for RK818
2017-04-21 11:34 GMT+08:00 Jacob Chen :
>
> The RK818 chip is a power management IC for multimedia and handheld
> devices. It contains the following components:
>
> - Regulators
> - RTC
> - Clkout
> - battery support
>
> This series patch just
Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.
TODO: I don't know how to deal with BOOST and LDO9,
so just ignore them now.
Signed-off-by: Jacob Chen
---
drivers/power/regulator/rk808
The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.
For boards use rk818, the input current should be set in the early stage, before
ddr initialization.
To use rk818,below configs should be enabled:
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=
Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.
I have also add reg prefix to exist registers, to keep them same style.
Signed-off-by: Jacob Chen
---
drivers/power/regulator/rk808.c | 18 ++---
include/power/rk808_pmic.h | 164 +
Using mask is more flexible than bits.
Signed-off-by: Jacob Chen
---
drivers/power/regulator/rk808.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index f1a00c5..441
The RK818 chip is a power management IC for multimedia and handheld
devices. It contains the following components:
- Regulators
- RTC
- Clkout
- battery support
This series patch just give it a basic support, to make rk818 board work.
Jacob Chen (4):
power: pmic: append rk818 regs to rk808
Add nvme commands in U-Boot command line.
1. "nvme list" - show all available NVMe blk devices
2. "nvme info" - show current or a specific NVMe blk device
3. "nvme device" - show or set current device
4. "nvme part" - print partition table
5. "nvme read" - read data from NVMe blk device
6. "nvme w
Add Support of devices that follow the NVM Express standard
basic functions: nvme Read/Write
Signed-off-by: Zhikang Zhang
Signed-off-by: Wenbin Song
---
Changes for v2:
- add UCLASS_NVME (drivers/block/nvme-uclasss.c)
- remove the support of non-BLK
- remove common/nvme.
Test for NVMe driver:
platform: LS1046AQDS
NVMe SSD: Intel P3700 400G
The test logs are as follow:
=> nvme list
Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN
Type: Hard Disk
Capacity: 381554.0 MB = 372.6 GB (781422768 x
Hi Eric,
On 19 April 2017 at 22:45, Eric Gao wrote:
> Add mipi dsi display support for rockchip soc.
>
> Changes in v4:
> -Clear irrelevant change
> -Clear irrelevant change.
> -Move this patch to an early stage.
>
> Changes in v3:
> -Split GRF changes as a single patch
> -Split mipi dsi driver
Hi Andreas,
On 20 April 2017 at 20:54, Andreas Färber wrote:
> Am 21.04.2017 um 04:43 schrieb Andreas Färber:
>> Am 21.04.2017 um 04:24 schrieb Andreas Färber:
>>> Hi Simon,
>>>
>>> Am 21.04.2017 um 04:10 schrieb Simon Glass:
I just tested mainline with those two changes and it works for me.
Hi Andy,
Sorry for forgetting about this, and thank you for picking it up.
Am 21.04.2017 um 04:32 schrieb Andy Yan:
> From: Andreas Färber
>
> The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
> The module can be used with base boards such as the GeekBox Landingship.
>
> This a
Am 21.04.2017 um 04:43 schrieb Andreas Färber:
> Am 21.04.2017 um 04:24 schrieb Andreas Färber:
>> Hi Simon,
>>
>> Am 21.04.2017 um 04:10 schrieb Simon Glass:
>>> I just tested mainline with those two changes and it works for me. I
>>> pushed my patch to u-boot-rockchip/firefly-working. Can you try
Am 21.04.2017 um 04:24 schrieb Andreas Färber:
> Hi Simon,
>
> Am 21.04.2017 um 04:10 schrieb Simon Glass:
>> On 20 April 2017 at 18:47, Andreas Färber wrote:
>>> Am 21.04.2017 um 02:34 schrieb Andreas Färber:
Am 21.04.2017 um 01:44 schrieb Simon Glass:
> On 20 April 2017 at 17:23, Andre
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.
Signed-off-by: Andy Yan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3368-sheep.dts | 2
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.
Signed-off-by: Andy Yan
---
arch/arm/dts/Makefile
From: Andreas Färber
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.
$ ./lollipop_u-boot/tools/loaderimage --pack u-boot.bin u-boot
Add sysreset driver to reset rk3368 SOC.
Signed-off-by: Andy Yan
---
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_rk3368.c | 58 ++
2 files changed, 59 insertions(+)
create mode 100644 drivers/sysreset/sysreset_rk3368.c
diff --git a/
From: Andreas Färber
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.
Signed-off-by: Andreas Färber
Signed-off-by: Andy Yan
---
arch/arm/dts/rk3368.dtsi | 1090 +
arc
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.
Signed-off-by: Andy Yan
---
arch/arm/include/asm/arch-rockchip/grf_rk3368.h | 443
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/rockchip/Makefile
Add driver to setup the various PLLs and peripheral
clocks on the RK3368.
Signed-off-by: Andy Yan
---
arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 110 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk_rk3368.c | 296 +
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.
Andreas Färber (2):
rockchip: rk3368: Add core start-up code for RK3368
rockchip: rk3368: Add initial support for RK3368 based GeekBox
Andy Yan (5):
rockchip:
Hi Simon,
Am 21.04.2017 um 04:10 schrieb Simon Glass:
> On 20 April 2017 at 18:47, Andreas Färber wrote:
>> Am 21.04.2017 um 02:34 schrieb Andreas Färber:
>>> Am 21.04.2017 um 01:44 schrieb Simon Glass:
On 20 April 2017 at 17:23, Andreas Färber wrote:
> Using -rc2 with firefly-rk3288 de
Hi Andreas,
On 20 April 2017 at 18:47, Andreas Färber wrote:
> Am 21.04.2017 um 02:34 schrieb Andreas Färber:
>> Hi Simon,
>>
>> Am 21.04.2017 um 01:44 schrieb Simon Glass:
>>> On 20 April 2017 at 17:23, Andreas Färber wrote:
Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL
Hi Andreas,
On Apr 20, 2017 18:34, "Andreas Färber" wrote:
Hi Simon,
Am 21.04.2017 um 01:44 schrieb Simon Glass:
> On 20 April 2017 at 17:23, Andreas Färber wrote:
>> Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
>> not into full U-Boot. I am using the old documented wa
modify u_qe_init to upload QE firmware from SD card when it is SD
boot
Signed-off-by: Zhao Qiang
---
Changes for v2:
- fix issue of memory leak
drivers/qe/qe.c | 37 -
include/configs/ls1043a_common.h | 2 ++
include/configs/ls1043ar
Am 21.04.2017 um 02:34 schrieb Andreas Färber:
> Hi Simon,
>
> Am 21.04.2017 um 01:44 schrieb Simon Glass:
>> On 20 April 2017 at 17:23, Andreas Färber wrote:
>>> Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
>>> not into full U-Boot. I am using the old documented way of d
Hi Simon,
Am 21.04.2017 um 01:44 schrieb Simon Glass:
> On 20 April 2017 at 17:23, Andreas Färber wrote:
>> Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
>> not into full U-Boot. I am using the old documented way of dd'ing to
>> sector 256 on SD (doc/README.rockchip).
>>
>
Hi Andreas,
On 20 April 2017 at 17:23, Andreas Färber wrote:
> Hi,
>
> Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
> not into full U-Boot. I am using the old documented way of dd'ing to
> sector 256 on SD (doc/README.rockchip).
>
> Looking at include/configs/rk3288_commo
Hi,
Using -rc2 with firefly-rk3288 defconfig I can only boot into SPL but
not into full U-Boot. I am using the old documented way of dd'ing to
sector 256 on SD (doc/README.rockchip).
Looking at include/configs/rk3288_common.h I also tried putting
u-boot.img on a FAT partition, to no effect.
v201
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.
Signed-off-by: York Sun
---
board/freescale/ls1043aqds/ddr.c | 4 +++-
board/freescale/ls1046aqds/ddr.c | 4 +++-
board/freescale/ls1046ardb/ddr.c | 4 +++-
3 files changed
On 17 April 2017 at 22:01, Simon Glass wrote:
> On 17 April 2017 at 09:50, Philipp Tomsich
> wrote:
>> The DDR3-1333 timings for the RK3399-Q7 (Puma) has some unintended
>> left-over comments in them. This change cleans the file up.
>>
>> Signed-off-by: Philipp Tomsich
>> ---
>>
>> arch/arm/dts/
On 18 April 2017 at 18:12, Simon Glass wrote:
> On 18 April 2017 at 05:17, Eddie Cai wrote:
>> enable debug uart for rk3288 and print something to let people know
>> where we are
>>
>> Signed-off-by: Eddie Cai
>> ---
>> arch/arm/mach-rockchip/rk3288-board-spl.c | 6 ++
>> 1 file changed, 2
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> The baudrate in rkspi was calculated by using an integer division
> (which implicitly discarded any fractional result), then rounding to
> an even number and finally clamping to 0xfffe using a bitwise AND
> operator. This introduced two issues:
On 16 April 2017 at 13:34, Simon Glass wrote:
> On 16 April 2017 at 03:44, Ziyuan Xu wrote:
>> The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for
>> it.
>>
>> Signed-off-by: Ziyuan Xu
>> ---
>>
>> drivers/clk/rockchip/clk_rk3188.c | 12
>> 1 file changed, 12 inser
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> This commit adds support for the pin-configuration of the SPI5
> controller of the RK3399 through the following changes:
> * grf_rk3399.h: adds definition for configuring the SPI5 pins
> in the GPIO2C group
> * periph.h: define
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>> The imagetool framework checks whether function pointer for the verify,
>> print and extract actions are available and will will handle their
>> absence appropriately.
>>
>> This change removes
On 18 April 2017 at 03:06, Kever Yang wrote:
> The pwm3 on evb-rk3399 is used for pwm regulator, need to invert
> the polarity to make it work correctly.
>
> Signed-off-by: Kever Yang
> Acked-by: Simon Glass
> ---
>
> Changes in v2:
> - commit message description fix
>
> arch/arm/dts/rk3399-evb
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>>
>> Our earlier change broke the generation of SPI images, by excluding the
>> 2K used for header0 from the size-calculation.
>>
>> This commit makes sure that these are included before calculati
On 17 April 2017 at 22:01, Simon Glass wrote:
> On 17 April 2017 at 09:50, Philipp Tomsich
> wrote:
>> With the validation done for DDR3-1600 (i.e. 800 MHz bus clock), we
>> add the timings (rk3399-sdram-ddr3-1600.dtsi) and change rk3399-puma.dts
>> to use these by default.
>>
>> Signed-off-by: P
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>
> Commit message?
>
>> Signed-off-by: Philipp Tomsich
>> ---
>>
>> tools/rksd.c | 7 +--
>> 1 file changed, 5 insertions(+), 2 deletions(-)
>>
>
> Acked-by: Simon Glass
Applied to u-boot-ro
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> From: Jakob Unterwurzacher
>
> The existing Rockchip SPI (rk_spi.c) driver also matches the hardware
> block found in the RK3399. This has been confirmed both with SPI NOR
> flashes and general SPI transfers on the RK3399-Q7 for SPI1 and SPI5.
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>> The calculation of the variable header size in rkcommon_vrec_header
>> had been update twice in the earlier series (introducing boot0-style
>> images to deal with the alignment of the first inst
On 17 April 2017 at 21:59, Simon Glass wrote:
> On 17 April 2017 at 08:24, Eric Gao wrote:
>> Modify Makefile for rockchip video driver according to Kconfig, so that
>> source code will not be compiled if not needed.
>>
>> Signed-off-by: Eric Gao
>> ---
>>
>> drivers/video/rockchip/Makefile | 7
On 16 April 2017 at 13:34, Simon Glass wrote:
> On 16 April 2017 at 03:44, Ziyuan Xu wrote:
>> The genunie bus clock is sclk_x for eMMC/SDIO, add support for it.
>>
>> Signed-off-by: Ziyuan Xu
>> ---
>>
>> drivers/clk/rockchip/clk_rk3036.c | 5 +
>> 1 file changed, 5 insertions(+)
>
> Acked
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> To include the ability to load from an SPI flash in SPL, it's not
> sufficient to define SPL_SPI_SUPPORT and SPL_SPI_FLASH_SUPPORT via
> Kconfig... so we conditionally define SPL_SPI_LOAD if SPI support
> is already enabled for SPL via Kconfig.
>
On 16 April 2017 at 13:34, Simon Glass wrote:
> On 16 April 2017 at 03:44, Ziyuan Xu wrote:
>> The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for
>> it.
>>
>> Signed-off-by: Ziyuan Xu
>> ---
>>
>> drivers/clk/rockchip/clk_rk3288.c | 12
>> 1 file changed, 12 inser
On 17 April 2017 at 21:58, Simon Glass wrote:
> On 17 April 2017 at 02:42, Kever Yang wrote:
>> RK3399 device memory region is 0xf800~0x.
>>
>> Signed-off-by: Kever Yang
>> ---
>>
>> arch/arm/mach-rockchip/rk3399/rk3399.c | 8
>> 1 file changed, 4 insertions(+), 4 deletions(-
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>> This change set adds documentation to the header0 initialisation and
>> improves readability for the calculations of various offsets/lengths.
>>
>> As the U-Boot SPL stage doesn't use any payloa
On 19 April 2017 at 02:01, Kever Yang wrote:
> Since our sdram driver is ready, we can use the actual size
> instead of hard code.
>
> Signed-off-by: Kever Yang
> Acked-by: Simon Glass
> ---
>
> Changes in v2:
> - fix compile warning of print type not match
>
> arch/arm/mach-rockchip/rk3399/sdr
On 17 April 2017 at 21:59, Simon Glass wrote:
> On 17 April 2017 at 08:24, Eric Gao wrote:
>> 1. add Kconfig for rockchip video driver, so that video port can be
>> selected as needed.
>> 2. move VIDEO_ROCKCHIP option to new Kconfig for concision.
>>
>> Signed-off-by: Eric Gao
>>
>> ---
>>
>> co
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> The original clock/bitrate selection code for the rk_spi driver was a
> bit limited, as it always selected a 99MHz input clock rate (which
> would allow for a maximum bitrate of 49.5MBit/s), but returned -EINVAL
> if a bitrate higher than 48MHz w
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> This change adds support for configuring the module clocks for SPI1 and
> SPI5 from the 594MHz GPLL.
>
> Note that the driver (rk_spi.c) always sets this to 99MHz, but the
> implemented functionality is more general and will also support
> differ
On 17 April 2017 at 22:00, Simon Glass wrote:
> On 17 April 2017 at 09:48, Philipp Tomsich
> wrote:
>> In (first) breaking and (then) fixing the rkspi tool, I realised that
>> the calculation of the required padding (for the header-size and the
>> 2K-in-every-4K SPI layout) was not as self-explai
On 20 April 2017 at 14:05, Philipp Tomsich
wrote:
> For the RK3399, i2c_set_rate (and by extension: our spi_set_rate,
> which had been mindlessly following the template of the i2c_set_rate
> implementation) miscalculates the rate returned due to a off-by-one
> error resulting from the following se
On 16 April 2017 at 13:34, Simon Glass wrote:
> On 16 April 2017 at 03:44, Ziyuan Xu wrote:
>> The genunie bus clock is sclk_x for eMMC/SDMMC, add support for it.
>>
>> Signed-off-by: Ziyuan Xu
>> ---
>>
>> drivers/clk/rockchip/clk_rk3328.c | 8
>> 1 file changed, 8 insertions(+)
>
> A
On 16 April 2017 at 13:30, Simon Glass wrote:
> On 11 April 2017 at 22:00, Kever Yang wrote:
>> Use regulators_enable_boot_on() instead of init regulators one by one,
>> the interface can init all the regulators with regulator-boot-on property.
>>
>> Signed-off-by: Kever Yang
>> ---
>>
>> board
On 17 April 2017 at 21:59, Simon Glass wrote:
> On 17 April 2017 at 09:43, Philipp Tomsich
> wrote:
>> This change adds support for configuring the module clocks for SPI1 and
>> SPI5 from the 594MHz GPLL.
>>
>> Note that the driver (rk_spi.c) always sets this to 99MHz, but the
>> implemented func
On 16 April 2017 at 13:34, Simon Glass wrote:
> On 16 April 2017 at 03:44, Ziyuan Xu wrote:
>> As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is
>> used for communication between host and card devices. The real bus clock
>> is ciu, so let's rectify it.
>>
>> Signed-off-by: Ziyua
On 16 April 2017 at 13:33, Simon Glass wrote:
> On 14 April 2017 at 00:55, Kever Yang wrote:
>> Add support for rk3328 package header in mkimage tool.
>>
>> Signed-off-by: Kever Yang
>> ---
>>
>> tools/rkcommon.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>
> Reviewed-by: Simon Glass
Applied
Hi Jonas,
On 20 April 2017 at 12:23, Jonas Karlman wrote:
> Set ethernet mac address in late init for Tinker Board,
> prevents getting a random mac address each boot.
>
> Read mac address from eeprom, first 6 bytes from m24c08@50.
> Same as /etc/init.d/rockchip.sh on Tinker OS.
>
> Signed-off-by:
On 16 April 2017 at 13:30, Simon Glass wrote:
> On 11 April 2017 at 21:54, Kever Yang wrote:
>> Clean the evb-rk3399_defconfig with make savedefconfig.
>>
>> Signed-off-by: Kever Yang
>> ---
>>
>> configs/evb-rk3399_defconfig | 14 +-
>> 1 file changed, 5 insertions(+), 9 deletions(
This commit adds support for the pin-configuration of the SPI5
controller of the RK3399 through the following changes:
* grf_rk3399.h: adds definition for configuring the SPI5 pins
in the GPIO2C group
* periph.h: defines PERIPH_ID_SPI3 through PERIPH_ID_SPI5
* pinctrl_rk3399.c:
To include the ability to load from an SPI flash in SPL, it's not
sufficient to define SPL_SPI_SUPPORT and SPL_SPI_FLASH_SUPPORT via
Kconfig... so we conditionally define SPL_SPI_LOAD if SPI support
is already enabled for SPL via Kconfig.
Signed-off-by: Philipp Tomsich
Acked-by: Simon Glass
---
The baudrate in rkspi was calculated by using an integer division
(which implicitly discarded any fractional result), then rounding to
an even number and finally clamping to 0xfffe using a bitwise AND
operator. This introduced two issues:
1) for very small baudrates (overflowing the 0xfffe range),
The original clock/bitrate selection code for the rk_spi driver was a
bit limited, as it always selected a 99MHz input clock rate (which
would allow for a maximum bitrate of 49.5MBit/s), but returned -EINVAL
if a bitrate higher than 48MHz was requested.
To give us better control over the bitrate (
This series adds SPI support for the RK3399 (SPI1 and SPI5). This
consists of the following individual changes:
- clock support for the SPI blocks clocked from GRF (i.e. SPI1, SPI2,
SPI 4 and SPI5)
- pinctrl for SPI1 and SPI5
- changes the SPI module input clock to 198MHz (instead of 99MHz) for
From: Jakob Unterwurzacher
The existing Rockchip SPI (rk_spi.c) driver also matches the hardware
block found in the RK3399. This has been confirmed both with SPI NOR
flashes and general SPI transfers on the RK3399-Q7 for SPI1 and SPI5.
This change adds the 'rockchip,rk3399-spi' string to its co
For the RK3399, i2c_set_rate (and by extension: our spi_set_rate,
which had been mindlessly following the template of the i2c_set_rate
implementation) miscalculates the rate returned due to a off-by-one
error resulting from the following sequence of events:
1. calculates 'src_div := src_freq / ta
This change adds support for configuring the module clocks for SPI1 and
SPI5 from the 594MHz GPLL.
Note that the driver (rk_spi.c) always sets this to 99MHz, but the
implemented functionality is more general and will also support
different clock configurations.
X-AffectedPlatforms: RK3399-Q7
Sign
On Tue, Apr 18, 2017 at 10:38:30PM +0200, Álvaro Fernández Rojas wrote:
> Commit 740d5d3 added two new features but only one feature name,
> which results in NULL prints when device_id feature is selected.
>
> Before:
> HG556a # cpu detail
>-1: cpu@0 BCM6358A1
> I
On Thu, Apr 20, 2017 at 08:36:28PM +0200, Álvaro Fernández Rojas wrote:
> This way we can see output about u-boot.elf being built or not.
>
> Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
On Thu, 2017-04-20 at 07:12 -0700, Dalon Westergreen wrote:
> On Wed, 2017-04-19 at 23:58 -0500, Dinh Nguyen wrote:
> >
> > On Wed, Apr 19, 2017 at 6:21 PM, Dalon Westergreen
> > wrote:
> > >
> > >
> > > On Wed, 2017-04-19 at 13:54 -0700, Dalon Westergreen wrote:
> > > >
> > > >
> > > > On We
On Thu, Apr 20, 2017 at 08:36:26PM +0200, Álvaro Fernández Rojas wrote:
> LD gives the following warning when trying to process u-boot-elf.o
> warning: cannot find entry symbol __start; defaulting to 8001
> According to gnu-libc the entry symbol for mips is __start and not _start:
> ht
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: Add cfi-flash defines.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
arch/mips/dts/brcm,bcm6328.dtsi | 88 +
arch/mips/mach-bmips/Kco
Use uclass_first_device and uclass_next_device in order to avoid exceptions
for drivers that aren't probed when cpu ops are requested.
Improve code style and fix indentations.
Fix incorrect line break when cpu info is not available.
Remove unneeded brackets.
Signed-off-by: Álvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: Add cfi-flash support.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.
arch/mips/dts/Makefile | 1 +
arch/mips/dts/huawei,hg556a.dts |
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
arch/mips/dts/brcm,bcm63268.dtsi | 88
arch/mips/mach-bmips/Kco
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.
arch/mips/dts/Makefile | 1 +
arch/mips/dts/comtrend,ar-5387un.dts| 27
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.
arch/mips/dts/Makefile | 1 +
arch/mips/dts/comtrend,vr-3032u.dts| 27 ++
Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Simon Glass
---
v4: No changes.
v3: No changes.
v2: No changes.
arch/mips/cpu/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/
CFE checks CPU Thread in a different way (using register $22):
mfc0t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnezt1, 2f # if we are running on thread 1, skip init
nop
Signed-off-by: Álvaro Fernández Rojas
---
v4: No changes.
v3: Select CONFIG_REMAKE
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Simon Glass
---
v4: No changes.
v3: Several improvements:
- Probe driver correctly.
- Allocate size for priv struct.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get regist
It is based on linux/drivers/tty/serial/bcm63xx_uart.c
Signed-off-by: Álvaro Fernández Rojas
---
v4: Add more missing register configurations based on CFE.
v3: Several improvements:
- Add missing register configurations based on CFE.
- Replace tabs with whitespaces.
- Cosmetic fixes.
v2:
Commit 740d5d3 added two new features but only one feature name,
which results in NULL prints when device_id feature is selected.
Before:
HG556a # cpu detail
-1: cpu@0 BCM6358A1
ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
Device ID 0x2a010
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Simon Glass
---
v4: No changes.
v3: Rename of_match to ids.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
drivers/ram/Makefile| 2 +
drivers/ram/bmips_ram.c | 126 ++
Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c,
which provides a generic driver for platforms that only require writing a mask
to a regmap offset.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Simon Glass
---
v4: Rebased.
v3: Introduce changes suggested by Si
This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx
v4: Introduce changes suggested by Simon Glass:
- Refactor cmd/cpu.
- Remove device_probe patch for sy
LD gives the following warning when trying to process u-boot-elf.o
warning: cannot find entry symbol __start; defaulting to 8001
According to gnu-libc the entry symbol for mips is __start and not _start:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/dl-machine.h;h=ed4751
This way we can see output about u-boot.elf being built or not.
Signed-off-by: Álvaro Fernández Rojas
---
v4: Introduce changes suggested by Tom Rini:
- Add new patch to output u-boot.elf build.
Makefile | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Makefile
Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf
Signed-off-by: Álvaro Fernández Rojas
---
v4: Introduce changes suggested by Tom Rini:
- __start is the standard for MIPS, not ARM.
v3: Introduce changes suggested by Daniel Schwierzeck:
- Add new patch.
arch/mip
This is needed in order to allow building it for other archs.
Move relocation comment to a better place.
Remove no longer needed dts FIXME.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Tom Rini
---
v4: no changes
v3: Introduce changes suggested by Daniel Schwierzeck:
- Split patches.
Provide an u-boot.elf binary for Broadcom MIPS platforms by re-using
the already existing Makefile target for aarch64.
This u-boot.elf binary should be used as a stage 2 loader
until U-Boot can be replace the original Broadcom boot loader.
Split patches from main BMIPS support.
Álvaro Fernández R
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