On 6/4/19 5:12 AM, Dalon L Westergreen wrote:
> On Tue, 2019-06-04 at 02:00 +0200, Marek Vasut wrote:
>> On 6/4/19 1:57 AM, Dalon Westergreen wrote:
>>> From: Dalon Westergreen <
>>> dalon.westergr...@intel.com
>>>
>>> Some architectures, Stratix10, require a hex formatted spl that combines
>>
On Tue, 2019-06-04 at 02:00 +0200, Marek Vasut wrote:
> On 6/4/19 1:57 AM, Dalon Westergreen wrote:
> > From: Dalon Westergreen <
> > dalon.westergr...@intel.com
> > >
> >
> > Some architectures, Stratix10, require a hex formatted spl that combines
> > the spl image and dtb. This adds a target to
On 6/4/19 1:57 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> Some architectures, Stratix10, require a hex formatted spl that combines
> the spl image and dtb. This adds a target to create said hex file with
> and offset of SPL_TEXT_BASE.
>
> Signed-off-by: Dalon Westergreen
>
[.
From: Dalon Westergreen
Some architectures, Stratix10, require a hex formatted spl that combines
the spl image and dtb. This adds a target to create said hex file with
and offset of SPL_TEXT_BASE.
Signed-off-by: Dalon Westergreen
---
Changes in v2:
-> Move spl hex file generation to SPL Make
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