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Today's Topics:
1. Re: RFNoC RF loopback in X310 (Dixon, James L)
2. Re: RFNoC RF loopback in X310 (Nick Foster)
3. burst and time tags in gr-ettus frnoc_block (Stephen Larew)
4. Re: RFNOC: Testbench stalling when simulating block with
multiple ports, bug in sim_rfnoc_lib.svh? (Jonathon Pendlum)
5. Re: Does USRP N200 contains Programmable Gain Amplifier?
(Radio User)
----------------------------------------------------------------------
Message: 1
Date: Tue, 2 May 2017 17:49:55 +0000
From: "Dixon, James L" <[email protected]>
To: Nick Foster <[email protected]>, "[email protected]"
<[email protected]>
Subject: Re: [USRP-users] RFNoC RF loopback in X310
Message-ID:
<c6947bb11568824d9ea822ba98f7c6c285a1c...@rrc-ats-exmb2.ats.atsinnovate.com>
Content-Type: text/plain; charset="windows-1252"
Hi Nick,
I followed your tutorial on RFNoC RF loopback on X310, adding all the lines of
code to the appropriate places. I then built the uhd and gr-ettus stuff by
going to their respective build directories and doing:
make install
They both built successfully.
I then modified my flowgraph to add the set_rx_streamer(True, chan) line, and
right after that I added the two lines to issue the stream command. However,
when I run my flowgraph, I get the error "'rfnoc_radio_sptr' object has no
attribute 'set_rx_streamer'." Any ideas? Did I not build the code correctly?
I'd appreciate any help you can give me.
Thanks,
Jim Dixon
________________________________
From: Nick Foster [[email protected]]
Sent: Saturday, April 22, 2017 3:47 PM
To: Dixon, James L; [email protected]
Subject: Re: [USRP-users] RFNoC RF loopback in X310
A belated update: here's a blog post detailing how to do hardware loopback in
RFNoC. It covers both the X310 and the E3xx (for which just a bit more work is
necessary). In general it should work for any device which supports RFNoC.
I've disabled comments on the site because the internet is a dumpster fire but
feel free to ask questions or provide comments to the list or to me personally.
https://corvid.io/2017/04/22/stupid-rfnoc-tricks-loopback/
Best,
Nick
On Thu, Mar 30, 2017 at 9:59 AM Nick Foster
<[email protected]<mailto:[email protected]>> wrote:
This is probably a good time for me to start working on that RFNoC loopback
tutorial.
Give me a few days, things are pretty busy right now. But yes, it's possible,
and the latency depends on what you do to the signal between RX and TX but can
be as low as <10us.
--n
On Thu, Mar 30, 2017, 8:26 AM Dixon, James L via USRP-users
<[email protected]<mailto:[email protected]>> wrote:
Hi,
I am new to RFNoC. I have installed the RFNoC branch of gnu-radio and I have
it working, where I can build a new FPGA image using Vivado and load it onto
the FPGA in an X310. I would like to create an RF loopback in the FPGA using
GRC without going through the host processor. I found several discussions on
this topic from about 1.5 years ago, when there seemed to be issues doing what
I want to do, but I don?t see any more recent posts stating that this problem
has been solved and giving the solution. I?ve tried a number of ideas that
were given in these discussions, but I can?t seem to get it to work. Is there
a solution or a demo out there now?
One of the reasons I want to do the above is to measure the minimum RF loopback
latency of such a design. Has this been done and are the results out there
anywhere?
Thanks,
Jim
_______________________________________________
USRP-users mailing list
[email protected]<mailto:[email protected]>
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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Message: 2
Date: Tue, 02 May 2017 18:39:38 +0000
From: Nick Foster <[email protected]>
To: "Dixon, James L" <[email protected]>,
"[email protected]" <[email protected]>
Subject: Re: [USRP-users] RFNoC RF loopback in X310
Message-ID:
<CA+JMMq-zQTG+zeDXTRRa8qkYnFkB7PgwuphtY7=8fawwrbo...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Wipe out your builds and rebuild. Sometimes SWIG won't pick up new stuff
added to headers.
--n
On Tue, May 2, 2017 at 10:51 AM Dixon, James L <[email protected]>
wrote:
> Hi Nick,
>
> I followed your tutorial on RFNoC RF loopback on X310, adding all the
> lines of code to the appropriate places. I then built the uhd and gr-ettus
> stuff by going to their respective build directories and doing:
> make install
>
> They both built successfully.
>
> I then modified my flowgraph to add the set_rx_streamer(True, chan) line,
> and right after that I added the two lines to issue the stream command.
> However, when I run my flowgraph, I get the error "'rfnoc_radio_sptr'
> object has no attribute 'set_rx_streamer'." Any ideas? Did I not build
> the code correctly? I'd appreciate any help you can give me.
>
> Thanks,
>
> Jim Dixon
>
> ------------------------------
> *From:* Nick Foster [[email protected]]
>
> *Sent:* Saturday, April 22, 2017 3:47 PM
> *To:* Dixon, James L; [email protected]
>
> *Subject:* Re: [USRP-users] RFNoC RF loopback in X310
> A belated update: here's a blog post detailing how to do hardware loopback
> in RFNoC. It covers both the X310 and the E3xx (for which just a bit more
> work is necessary). In general it should work for any device which supports
> RFNoC.
>
> I've disabled comments on the site because the internet is a dumpster fire
> but feel free to ask questions or provide comments to the list or to me
> personally.
>
> https://corvid.io/2017/04/22/stupid-rfnoc-tricks-loopback/
>
> Best,
> Nick
>
> On Thu, Mar 30, 2017 at 9:59 AM Nick Foster <[email protected]> wrote:
>
>> This is probably a good time for me to start working on that RFNoC
>> loopback tutorial.
>>
>> Give me a few days, things are pretty busy right now. But yes, it's
>> possible, and the latency depends on what you do to the signal between RX
>> and TX but can be as low as <10us.
>>
>> --n
>>
>> On Thu, Mar 30, 2017, 8:26 AM Dixon, James L via USRP-users <
>> [email protected]> wrote:
>>
>>> Hi,
>>>
>>>
>>>
>>> I am new to RFNoC. I have installed the RFNoC branch of gnu-radio and I
>>> have it working, where I can build a new FPGA image using Vivado and load
>>> it onto the FPGA in an X310. I would like to create an RF loopback in the
>>> FPGA using GRC without going through the host processor. I found several
>>> discussions on this topic from about 1.5 years ago, when there seemed to be
>>> issues doing what I want to do, but I don?t see any more recent posts
>>> stating that this problem has been solved and giving the solution. I?ve
>>> tried a number of ideas that were given in these discussions, but I can?t
>>> seem to get it to work. Is there a solution or a demo out there now?
>>>
>>>
>>>
>>> One of the reasons I want to do the above is to measure the minimum RF
>>> loopback latency of such a design. Has this been done and are the results
>>> out there anywhere?
>>>
>>>
>>>
>>> Thanks,
>>>
>>>
>>>
>>> Jim
>>> _______________________________________________
>>> USRP-users mailing list
>>> [email protected]
>>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>>
>>
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Message: 3
Date: Tue, 2 May 2017 17:35:59 -0400
From: Stephen Larew <[email protected]>
To: USRP-users <[email protected]>
Subject: [USRP-users] burst and time tags in gr-ettus frnoc_block
Message-ID: <[email protected]>
Content-Type: text/plain; charset=utf-8
I?m working on a TDD system and will eventually be using RFNoC on x310 radios.
The gr::uhd::usrp_sink GNU Radio block supports SOB/EOB and time tags, but I do
not see similar support in the gr-ettus OOT module. Is this a limitation in
UHD/RFNoC or is it simply a lack of implementation in gr-ettus? Or am I not
reading the gr-ettus code correctly?
-Stephen
------------------------------
Message: 4
Date: Tue, 2 May 2017 18:33:02 -0500
From: Jonathon Pendlum <[email protected]>
To: "Templin, Josh" <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] RFNOC: Testbench stalling when simulating
block with multiple ports, bug in sim_rfnoc_lib.svh?
Message-ID:
<CAGdo0uSk2-goB0_npthQ-=eua+h1a4zukcvewdatguu74y-...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi,
Would you mind submitting a pull request or a patch for this issue? Since
you did the hard work debugging, you should get the credit for the fix. :-)
On Tue, Apr 25, 2017 at 5:09 PM, Templin, Josh <[email protected]> wrote:
> The connection does complete. It appeared not to before because sometimes
> the TCL Console in XSim drops/doesn?t fully flush print statements before
> it terminates, but a second run of the testbench verified the connection
> completed and the testbench proceeded.
>
>
>
> Thanks,
>
> Josh
>
>
>
>
>
> *From:* USRP-users [mailto:[email protected]] *On Behalf
> Of *Templin, Josh via USRP-users
> *Sent:* Tuesday, April 25, 2017 3:05 PM
> *To:* Jonathon Pendlum
>
> *Cc:* [email protected]
> *Subject:* [EXTERNAL] Re: [USRP-users] RFNOC: Testbench stalling when
> simulating block with multiple ports, bug in sim_rfnoc_lib.svh?
>
>
>
> It progresses further, but the connect does not succeed yet. I?ll do some
> more investigating and report back.
>
>
>
>
>
>
>
> *From:* Jonathon Pendlum [mailto:[email protected]
> <[email protected]>]
> *Sent:* Tuesday, April 25, 2017 1:13 PM
> *To:* Templin, Josh
> *Cc:* [email protected]
> *Subject:* [EXTERNAL] Re: [USRP-users] RFNOC: Testbench stalling when
> simulating block with multiple ports, bug in sim_rfnoc_lib.svh?
>
>
>
> Hi Josh,
>
>
>
> That is a bug and you are correct, it should be "sid_``to_noc_block_name".
> If you make that change, does your testbench work?
>
>
>
>
>
>
>
> Jonathon
>
>
>
> On Tue, Apr 25, 2017 at 11:11 AM, Templin, Josh via USRP-users <
> [email protected]> wrote:
>
> Hi all,
>
>
>
> I am developing a multi-port RFNOC block with UHD 3.10.1.1 and simulating
> using XSim in Vivado 2015.4 on Ubuntu 16.04 targeting an X300. When I
> simulate, the simulation stalls whenever I connect the second port on my
> module as the destination, as in the testbench line:
>
>
>
> `RFNOC_CONNECT_BLOCK_PORT(noc_block_tb,0,noc_block_test,1,
> SC16,SPP);
>
>
>
> Looking at the xbar transactions in the simulation, the last transaction
> is a command transaction from the tb_config crossbar port (port 0.3.0 in my
> testbench) to the noc_block_test crossbar port (port 0.1.1 in my
> testbench). The command packet is:
>
>
>
> 8093001000300011
>
> 0000007d00c1ea12
>
>
>
> Which looks fine and seems to correspond to the second write_reg command
> in the RFNOC_CONNECT_BLOCK_PORT macro found in sim_rfnoc_lib.svh:
>
>
>
> // Setup RFNoC block flow control per block port
>
> //
>
> // Usage: `RFNOC_CONNECT_BLOCK_PORT()
>
> // - from_noc_block_name: Name of producer (or upstream) RFNoC block
>
> // - from_block_port: Block port of producer RFNoC block
>
> // - to_noc_block_name: Name of consumer (or downstream) RFNoC block
>
> // - to_block_port: Block port of consumer RFNoC block
>
> // - data_type: Data type for data stream (i.e. SC16, FC32,
> etc)
>
> // - spp: Samples per packet
>
> //
>
> `define RFNOC_CONNECT_BLOCK_PORT(from_noc_block_name,from_block_
> port,to_noc_block_name,to_block_port,data_type,spp) \
>
> $display("Connecting %s (SID: %0d:%0d) to %s (SID: %0d:%0d)", \
>
> `"from_noc_block_name`",sid_``from_noc_block_name >>
> 4,from_block_port, \
>
> `"to_noc_block_name`",sid_``to_noc_block_name >>
> 4,to_block_port); \
>
> // Clear block, write be any value \
>
> tb_config.write_reg(sid_``from_noc_block_name, SR_CLEAR_TX_FC,
> 32'hC1EA12, from_block_port); \
>
> >> tb_config.write_reg(sid_``from_noc_block_name, SR_CLEAR_RX_FC,
> 32'hC1EA12, to_block_port); \
>
>
>
> The pairing of ?from_noc_block_name? with ?to_block_port? seems to be
> causing the problem, since the source block has only 1 port but I am
> connecting to the destination block?s 2nd port. It seems like this should
> be sid_``to_noc_block_name? Is this a bug or am I misunderstanding how to
> connect and use multi-port blocks?
>
>
>
> I encountered this problem earlier when connecting to my testbench and was
> able to workaround it by declaring my testbench to have 2 ports and
> ignoring the second port. Now, I am connecting to another rfnoc block from
> the library and I cannot trivially change its number of ports, so my
> workaround fails.
>
>
>
> Thanks,
>
> Josh
>
>
>
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
>
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------------------------------
Message: 5
Date: Tue, 2 May 2017 21:17:24 -0400
From: Radio User <[email protected]>
To: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] Does USRP N200 contains Programmable Gain
Amplifier?
Message-ID:
<CA+rmjiGsxMfje=rhhu7pkhdyljrjbexnjtggnpjx5uh6am5...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
For any USRP configuration, you can use uhd_usrp_probe to get a pretty good
inventory of all the capabilities. For instance, on my N200/UBX:
$ uhd_usrp_probe
linux; GNU C++ version 6.2.1 20160916 (Red Hat 6.2.1-2); Boost_106000;
UHD_003.010.001.HEAD-0-g929e3b32
-- Opening a USRP2/N-Series device...
-- Current recv frame size: 1472 bytes
-- Current send frame size: 1472 bytes
-- Detecting internal GPSDO.... No GPSDO found
_____________________________________________________
/
| Device: USRP2 / N-Series Device
| _____________________________________________________
| /
| | Mboard: N200
| | hardware: 2560
------------------------------snip-----------------------------------
| | | /
| | | | RX Frontend: 0
| | | | Name: UBX RX
| | | | Antennas: TX/RX, RX2, CAL
| | | | Sensors: lo_locked
| | | | Freq range: 10.000 to 6000.000 MHz
| | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB
| | | | Bandwidth range: 40000000.0 to 40000000.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
------------------------------------snip--------------------------------
73
Hi All,
> I am working on USRP n200. In the datasheet, there is no clue of PGA. I did
> studied a few documents about USRP description and found that USRP contains
> PGA before the ADC. I am using USRP with Gnuradio and when I set a gain
> value in RF options of UHD_Source block, it has no effect on the signal
> which shows that there is no PGA. My questions are
> 1. Does USRP n200 contains PGA before ADC in its motherboard?
> 2. If yes, How can I get access to it and utilize it from Gnuradio, not
> FPGA?
>
> Regards,
> Munir
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