That's an interesting development that I wasn't aware of! As it turns out, 
we're using Vivado 2018.2, but this might be a strong motivator to switch to 
the newer tools.

Thanks for the heads-up. I'll definitely look into it.

Jason 


> On 27 Jun 2019, at 17:05, Forbes, David C - (dforbes) 
> <dfor...@email.arizona.edu> wrote:
> 
> Jason,
> 
> Xilinx has started to offer an SSR (Super Sample Rate) DSP library with 
> Vivado 2018.3, which CASPER would do well to migrate towards. But if you're 
> stuck in the old toolchain, then I can't help you. 
> 
> 
> David Forbes
> Arizona Radio Observatory
> Tucson, AZ
> W: 520-626-1361  C: 520-989-1491
> 
> -----Original Message-----
> From: Jason Manley <jman...@ska.ac.za> 
> Sent: Thursday, June 27, 2019 7:51 AM
> To: Casper Lists <casper@lists.berkeley.edu>
> Subject: [casper] FIR and decimating CIC filter
> 
> Hi CASPERites
> 
> Has anyone implemented a decimating CIC filter on a CASPER platform? How 
> 'bout a conventional IIR or FIR filter? We're after ones that accept parallel 
> input samples; the Xilinx one doesn't seem to do wideband signals.
> 
> We're looking at options for a new digital downconverter. Please let me know 
> if you've got something you could share with us to use. If not, we'll have to 
> start modding the PFB_FIR and existing DDC library blocks for our needs.
> 
> Jason Manley
> DSP Manager
> SKA-SA
> 
> Cell: +27 82 662 7726
> Work: +27 21 506 7300
> 
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