Hi all. I'm designing an FPGA based instrument control system with a gigabit Ethernet port. It should be easy to make this work, but alas, it's giving me fits.
I have a Xilinx Artix-7 FPGA on the board, driving a TI PHY using the RGMII interface from the Xilinx tri-mode Ethernet MAC core. It mostly works, but not completely reliably. If I setup the PHY in analog loopback mode, which loops the packets back to the FPGA, I can run packets at full line rate all day with no errors. So I'm somewhat convinced that the RGMII link is good between the FPGA and the PHY. If I link the board up to a computer (I've tried a couple different ones,) I get ~5 to 10% of the packets being received with CRC errors. Is there anyone on the list that's designed Gigabit Ethernet hardware that could give me a hand with this? Any ideas that jump out? I've run our of ideas. Thanks for any advice. If you are or know a good Gigabit Ethernet guru for hire, let me know! John -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CABmH8B-suUrcdbRYvUpCqF5NuqSE8mboYxFcGj0Mv%3DGMjDoVcQ%40mail.gmail.com.
