cinap_len...@felloff.net writes: > why? the *HOST CONTROLLER* schedules the data transfers.
I *DON'T KNOW*. It's just observed behaviour. > ahhhh! we'r talking about some crappy raspi here... probably with all > caches disabled... never mind. Hah. An Rpi tips over with 1200 baud USB serial. I was talking about "real" (Intel :-P) hardware for the other tippy-over behaviour. --lyndon
