Lluís Batlle wrote:
Thank you all...
In fact I managed to get the ethernet driver working at the first code
change I tried today!
This means that by now I won't try to debug the kernel, but I really
like to have known of these kernel debugging techniques.
Btw, I had problems with the Rhine ethernet driver. I got much help
from #plan9... the driver wanted to align some structures to the cache
line size. The driver read the cls from the pci configuration space,
and my card had that register *bad* (0x04 instead of 0x08, for the x86
architecture I use).
As the driver allocates several Ds structures with a big malloc, and
dividing the allocated area to (p+=cls) parts, each for each Ds
structure, the driver required that cls >= sizeof Ds. That wasn't met
in my system, and the driver decided not to load.
I simply set manually the alignement to 32 bytes (0x08 dwords,
according to pci cls terminology), and it worked well for several
minutes, until I had to turn off the system.
Yesterday I tried aligning to 64 bytes, which I thought should work,
but it only worked for some tens of packets, and then the card
'hanged'. I cannot describe that hang better than the simple user
experience of no network packet receiving any answer, since some pings
worked and I could mount sources.
My VIA C7 based machine has the same problem:
0.18.0: net 02.00.00 1106/3065 10 0:0000f001 256 1:fdffe000 256
VIA Technology VT6102 Rhine II PCI Fast Ethernet Controller
so i could help you testing that thing :-)
cinap
