Sebastian Smolorz wrote: > Jan Kiszka wrote: >> Sebastian Smolorz wrote: >>> Hi, >>> >>> we all know that the latency test should not be run with a period of 100 >>> us because it easily gets locked up. The attached trace illustrates this >>> problem in detail. It shows that a timer interrupt needs about 50 us to >>> be processed. Furthermore, there is not enough time between two timer >>> interrupts for the latency task to get all its work done. >>> >>> The current I-pipe tracer patch for ARM is available at >>> http://opensource.emlix.com/ipipe-s3c24xx/download/ipipe-tracer-arm.patch >>> _v4 >>> >>> Comments welcome. >> Something is still broken, given all those "N"s in Delay column. Is >> there something like NMI at all on your board? > > There isn't AFAIK. What could be the reason for all this noise? Recursive > spin-locking?
Yes. If those Ns aren't false positive in the sense that IPIPE_TFLG_NMI_HIT is set accidentally, __ipipe_trace is re-entered while IPIPE_TFLG_NMI_LOCK is still set. Jan
signature.asc
Description: OpenPGP digital signature
_______________________________________________ Adeos-main mailing list [email protected] https://mail.gna.org/listinfo/adeos-main
