Update of /cvsroot/alsa/alsa-kernel/pci/ac97
In directory sc8-pr-cvs1:/tmp/cvs-serv9962/pci/ac97
Modified Files:
ac97_codec.c ac97_patch.c
Log Message:
- fixed the resume of ad18xx chips.
- fixed the bit mask of cs spdif rate.
Index: ac97_codec.c
===================================================================
RCS file: /cvsroot/alsa/alsa-kernel/pci/ac97/ac97_codec.c,v
retrieving revision 1.79
retrieving revision 1.80
diff -u -r1.79 -r1.80
--- ac97_codec.c 24 Mar 2003 16:32:33 -0000 1.79
+++ ac97_codec.c 27 Mar 2003 12:39:46 -0000 1.80
@@ -2537,7 +2537,7 @@
static int set_spdif_rate(ac97_t *ac97, unsigned short rate)
{
- unsigned short old, bits, reg;
+ unsigned short old, bits, reg, mask;
if (! (ac97->ext_id & AC97_EI_SPDIF))
return -ENODEV;
@@ -2551,6 +2551,7 @@
return -EINVAL;
}
reg = AC97_CSR_SPDIF;
+ mask = 1 << AC97_SC_SPSR_SHIFT;
} else {
switch (rate) {
case 44100: bits = AC97_SC_SPSR_44K; break;
@@ -2561,14 +2562,15 @@
return -EINVAL;
}
reg = AC97_SPDIF;
+ mask = AC97_SC_SPSR_MASK;
}
spin_lock(&ac97->reg_lock);
- old = ac97->regs[reg] & ~AC97_SC_SPSR_MASK;
+ old = ac97->regs[reg] & ~mask;
spin_unlock(&ac97->reg_lock);
if (old != bits) {
snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
- snd_ac97_update_bits(ac97, reg, AC97_SC_SPSR_MASK, bits);
+ snd_ac97_update_bits(ac97, reg, mask, bits);
}
snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
return 0;
@@ -2660,7 +2662,7 @@
*/
void snd_ac97_resume(ac97_t *ac97)
{
- int i;
+ int i, is_ad18xx, codec;
if (ac97->reset) {
ac97->reset(ac97);
@@ -2685,6 +2687,20 @@
if (ac97->init)
ac97->init(ac97);
+ is_ad18xx = (ac97->id & 0xffffff40) == AC97_ID_AD1881;
+ if (is_ad18xx) {
+ /* restore the AD18xx codec configurations */
+ for (codec = 0; codec < 3; codec++) {
+ if (! ac97->spec.ad18xx.id[codec])
+ continue;
+ /* select single codec */
+ ac97->write(ac97, AC97_AD_SERIAL_CFG,
ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
+ ac97->write(ac97, AC97_AD_CODEC_CFG,
ac97->spec.ad18xx.codec_cfg[codec]);
+ }
+ /* select all codecs */
+ ac97->write(ac97, AC97_AD_SERIAL_CFG, 0x7000);
+ }
+
/* restore ac97 status */
for (i = 2; i < 0x7c ; i += 2) {
if (i == AC97_POWERDOWN || i == AC97_EXTENDED_ID)
@@ -2693,8 +2709,42 @@
* some chip (e.g. nm256) may hang up when unsupported registers
* are accessed..!
*/
- if (test_bit(i, ac97->reg_accessed))
+ if (test_bit(i, ac97->reg_accessed)) {
+ if (is_ad18xx) {
+ /* handle multi codecs for AD18xx */
+ if (i == AC97_PCM) {
+ for (codec = 0; codec < 3; codec++) {
+ if (! ac97->spec.ad18xx.id[codec])
+ continue;
+ /* select single codec */
+ ac97->write(ac97, AC97_AD_SERIAL_CFG,
ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
+ /* update PCM bits */
+ ac97->write(ac97, AC97_PCM,
ac97->spec.ad18xx.pcmreg[codec]);
+ }
+ /* select all codecs */
+ ac97->write(ac97, AC97_AD_SERIAL_CFG, 0x7000);
+ continue;
+ } else if (i == AC97_AD_TEST ||
+ i == AC97_AD_CODEC_CFG ||
+ i == AC97_AD_SERIAL_CFG)
+ continue; /* ignore */
+ }
snd_ac97_write(ac97, i, ac97->regs[i]);
+ snd_ac97_read(ac97, i);
+ }
+ }
+
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if (ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_SPDIF) {
+ /* reset spdif status */
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
AC97_EA_SPDIF, 0);
+ snd_ac97_write(ac97, AC97_EXTENDED_STATUS,
ac97->regs[AC97_EXTENDED_STATUS]);
+ if (ac97->flags & AC97_CS_SPDIF)
+ snd_ac97_write(ac97, AC97_CSR_SPDIF,
ac97->regs[AC97_CSR_SPDIF]);
+ else
+ snd_ac97_write(ac97, AC97_SPDIF,
ac97->regs[AC97_SPDIF]);
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
+ }
}
}
#endif
Index: ac97_patch.c
===================================================================
RCS file: /cvsroot/alsa/alsa-kernel/pci/ac97/ac97_patch.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- ac97_patch.c 25 Feb 2003 16:56:25 -0000 1.9
+++ ac97_patch.c 27 Mar 2003 12:39:47 -0000 1.10
@@ -221,6 +221,7 @@
return 0;
ac97->spec.ad18xx.unchained[idx] = mask;
ac97->spec.ad18xx.id[idx] = val;
+ ac97->spec.ad18xx.codec_cfg[idx] = 0x0000;
return mask;
}
@@ -238,6 +239,7 @@
snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, codec_bits);
ac97->spec.ad18xx.chained[idx] = cfg_bits[idx];
ac97->spec.ad18xx.id[idx] = val;
+ ac97->spec.ad18xx.codec_cfg[idx] = codec_bits ? codec_bits : 0x0004;
return 1;
}
@@ -253,6 +255,7 @@
// test for chained codecs
snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG,
ac97->spec.ad18xx.unchained[unchained_idx]);
snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0002); // ID1C
+ ac97->spec.ad18xx.codec_cfg[unchained_idx] = 0x0002;
if (cidx1 >= 0) {
if (patch_ad1881_chained1(ac97, cidx1, 0x0006)) // SDIE | ID1C
patch_ad1881_chained1(ac97, cidx2, 0);
@@ -306,6 +309,9 @@
if (num == 1) {
/* ok, deselect all ID bits */
snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0000);
+ ac97->spec.ad18xx.codec_cfg[0] =
+ ac97->spec.ad18xx.codec_cfg[1] =
+ ac97->spec.ad18xx.codec_cfg[2] = 0x0000;
}
/* required for AD1886/AD1885 combination */
ac97->ext_id = snd_ac97_read(ac97, AC97_EXTENDED_ID);
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