Update of /cvsroot/alsa/alsa-kernel/pci
In directory sc8-pr-cvs1:/tmp/cvs-serv3760
Modified Files:
maestro3.c
Log Message:
- clean up PM codes.
- send ack in interrupts after processing the streams.
- added mpu401 control codes experimentally, not working yet.
Index: maestro3.c
===================================================================
RCS file: /cvsroot/alsa/alsa-kernel/pci/maestro3.c,v
retrieving revision 1.37
retrieving revision 1.38
diff -u -r1.37 -r1.38
--- maestro3.c 19 May 2003 15:19:36 -0000 1.37
+++ maestro3.c 18 Jun 2003 11:09:13 -0000 1.38
@@ -43,6 +43,7 @@
#include <sound/info.h>
#include <sound/control.h>
#include <sound/pcm.h>
+#include <sound/mpu401.h>
#include <sound/ac97_codec.h>
#define SNDRV_GET_ID
#include <sound/initval.h>
@@ -851,6 +852,9 @@
int external_amp;
int amp_gpio;
+ /* midi */
+ snd_rawmidi_t *rmidi;
+
/* pcm streams */
int num_substreams;
m3_dma_t *substreams;
@@ -971,6 +975,11 @@
* lowlevel functions
*/
+#define big_mdelay(msec) do {\
+ set_current_state(TASK_UNINTERRUPTIBLE);\
+ schedule_timeout(((msec) * HZ) / 1000);\
+} while (0)
+
inline static void snd_m3_outw(m3_t *chip, u16 value, unsigned long reg)
{
outw(value, chip->iobase + reg);
@@ -1012,7 +1021,7 @@
static void snd_m3_assp_halt(m3_t *chip)
{
chip->reset_state = snd_m3_inb(chip, DSP_PORT_CONTROL_REG_B) &
~REGB_STOP_CLOCK;
- mdelay(10);
+ big_mdelay(10);
snd_m3_outb(chip, chip->reset_state & ~REGB_ENABLE_RESET,
DSP_PORT_CONTROL_REG_B);
}
@@ -1562,17 +1571,11 @@
u8 status;
int i;
- status = inb(chip->iobase + 0x1A);
+ status = inb(chip->iobase + HOST_INT_STATUS);
if (status == 0xff)
return IRQ_NONE;
- /* presumably acking the ints? */
- outw(status, chip->iobase + 0x1A);
-
- /*if (in_suspend)
- return IRQ_NONE;*/
-
/*
* ack an assp int if its running
* and has an int pending
@@ -1595,9 +1598,13 @@
}
}
- /* XXX is this needed? */
- if (status & 0x40)
- outb(0x40, chip->iobase+0x1A);
+#if 0 /* TODO: not supported yet */
+ if ((status & MPU401_INT_PENDING) && chip->rmidi)
+ snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
+#endif
+
+ /* ack ints */
+ snd_m3_outw(chip, HOST_INT_STATUS, status);
return IRQ_HANDLED;
}
@@ -1898,7 +1905,7 @@
return (ret == 0) || (ret == 0xffff);
}
-static void snd_m3_ac97_reset(m3_t *chip, int busywait)
+static void snd_m3_ac97_reset(m3_t *chip)
{
u16 dir;
int delay1 = 0, delay2 = 0, i;
@@ -1933,12 +1940,8 @@
outw(0, io + GPIO_DATA);
outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION);
- if (busywait) {
- mdelay(delay1);
- } else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay1 * HZ) / 1000);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((delay1 * HZ) / 1000);
outw(GPO_PRIMARY_AC97, io + GPIO_DATA);
udelay(5);
@@ -1946,12 +1949,9 @@
outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A);
outw(~0, io + GPIO_MASK);
- if (busywait) {
- mdelay(delay2);
- } else {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay2 * HZ) / 1000);
- }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout((delay2 * HZ) / 1000);
+
if (! snd_m3_try_read_vendor(chip))
break;
@@ -1968,9 +1968,9 @@
*/
tmp = inw(io + RING_BUS_CTRL_A);
outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A);
- mdelay(20);
+ big_mdelay(20);
outw(tmp, io + RING_BUS_CTRL_A);
- mdelay(50);
+ big_mdelay(50);
#endif
}
@@ -2298,8 +2298,15 @@
{
struct pci_dev *pcidev = chip->pci;
u32 n;
+ u16 w;
u8 t; /* makes as much sense as 'n', no? */
+ pci_read_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, &w);
+ w &= ~(SOUND_BLASTER_ENABLE|FM_SYNTHESIS_ENABLE|
+ MPU401_IO_ENABLE|MPU401_IRQ_ENABLE|ALIAS_10BIT_IO|
+ DISABLE_LEGACY);
+ pci_write_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, &w);
+
pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
n &= REDUCED_DEBOUNCE;
n |= PM_CTRL_ENABLE | CLK_DIV_BY_49 | USE_PCI_TIMING;
@@ -2337,7 +2344,7 @@
{
unsigned long io = chip->iobase;
- outw(ASSP_INT_ENABLE, io + HOST_INT_CTRL);
+ outw(ASSP_INT_ENABLE | MPU401_INT_ENABLE, io + HOST_INT_CTRL);
outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE,
io + ASSP_CONTROL_C);
}
@@ -2363,6 +2370,10 @@
spin_unlock_irqrestore(&chip->reg_lock, flags);
kfree(chip->substreams);
}
+ if (chip->iobase_res) {
+ snd_m3_outw(chip, HOST_INT_CTRL, 0); /* disable ints */
+ }
+
#ifdef CONFIG_PM
if (chip->suspend_mem)
vfree(chip->suspend_mem);
@@ -2400,7 +2411,7 @@
snd_pcm_suspend_all(chip->pcm);
- mdelay(10); /* give the assp a chance to idle.. */
+ big_mdelay(10); /* give the assp a chance to idle.. */
snd_m3_assp_halt(chip);
@@ -2435,7 +2446,7 @@
snd_m3_chip_init(chip);
snd_m3_assp_halt(chip);
- snd_m3_ac97_reset(chip, 1);
+ snd_m3_ac97_reset(chip);
/* restore dsp image */
index = 0;
@@ -2460,7 +2471,6 @@
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
-#ifndef PCI_OLD_SUSPEND
static int snd_m3_suspend(struct pci_dev *pci, u32 state)
{
m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return -ENXIO);
@@ -2473,18 +2483,6 @@
m3_resume(chip);
return 0;
}
-#else
-static void snd_m3_suspend(struct pci_dev *pci)
-{
- m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return);
- m3_suspend(chip);
-}
-static void snd_m3_resume(struct pci_dev *pci)
-{
- m3_t *chip = snd_magic_cast(m3_t, pci_get_drvdata(pci), return);
- m3_resume(chip);
-}
-#endif
/* callback */
static int snd_m3_set_power_state(snd_card_t *card, unsigned int power_state)
@@ -2606,7 +2604,7 @@
snd_m3_chip_init(chip);
snd_m3_assp_halt(chip);
- snd_m3_ac97_reset(chip, 0);
+ snd_m3_ac97_reset(chip);
snd_m3_assp_init(chip);
snd_m3_amp_enable(chip, 1);
@@ -2716,6 +2714,15 @@
snd_card_free(card);
return err;
}
+
+#if 0 /* TODO: not supported yet */
+ /* TODO enable midi irq and i/o */
+ err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401,
+ chip->iobase + MPU401_DATA_PORT, 1,
+ chip->irq, 0, &chip->rmidi);
+ if (err < 0)
+ printk(KERN_WARNING "maestro3: no midi support.\n");
+#endif
pci_set_drvdata(pci, chip);
dev++;
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