> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Saturday, September 24, 2016 4:39 AM > To: amd-gfx@lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH] drm/amdgpu: bypass vce clock if vce is idle on Fiji. > > Change-Id: I74bdf39af332eb369e87c989b344f3e06cbfc714 > Signed-off-by: Rex Zhu <rex....@amd.com>
Is there any reason not to do this for all asics? Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c > b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c > index a6b4e27..43b26eb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c > @@ -716,7 +716,8 @@ static int vce_v3_0_set_clockgating_state(void > *handle, > int i; > > if ((adev->asic_type == CHIP_POLARIS10) || > - (adev->asic_type == CHIP_TONGA)) > + (adev->asic_type == CHIP_TONGA) || > + (adev->asic_type == CHIP_FIJI)) > vce_v3_0_set_bypass_mode(adev, enable); > > if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx