From: Christian König <christian.koe...@amd.com>

This way we can use parse_cs and still keep VM mode enabled.

Signed-off-by: Christian König <christian.koe...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 9 +++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 3 +++
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 04b7aaf..cf03f9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -822,13 +822,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device 
*adev,
 
        /* Only for UVD/VCE VM emulation */
        if (ring->funcs->parse_cs) {
-               p->job->vm = NULL;
                for (i = 0; i < p->job->num_ibs; i++) {
                        r = amdgpu_ring_parse_cs(ring, p, i);
                        if (r)
                                return r;
                }
-       } else {
+       }
+
+       if (p->job->vm) {
                p->job->vm_pd_addr = amdgpu_bo_gpu_offset(vm->page_directory);
 
                r = amdgpu_bo_vm_update_pte(p, vm);
@@ -917,7 +918,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
                        offset = ((uint64_t)m->it.start) * AMDGPU_GPU_PAGE_SIZE;
                        kptr += chunk_ib->va_start - offset;
 
-                       r =  amdgpu_ib_get(adev, NULL, chunk_ib->ib_bytes, ib);
+                       r =  amdgpu_ib_get(adev, vm, chunk_ib->ib_bytes, ib);
                        if (r) {
                                DRM_ERROR("Failed to get ib !\n");
                                return r;
@@ -932,9 +933,9 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
                                return r;
                        }
 
-                       ib->gpu_addr = chunk_ib->va_start;
                }
 
+               ib->gpu_addr = chunk_ib->va_start;
                ib->length_dw = chunk_ib->ib_bytes / 4;
                ib->flags = chunk_ib->flags;
                j++;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index d67eada..1b54cc2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -876,6 +876,9 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser 
*parser, uint32_t ib_idx)
        struct amdgpu_ib *ib = &parser->job->ibs[ib_idx];
        int r;
 
+       parser->job->vm = NULL;
+       ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
+
        if (ib->length_dw % 16) {
                DRM_ERROR("UVD IB length (%d) not 16 dwords aligned!\n",
                          ib->length_dw);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 2fb469a..05a1ea9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -642,6 +642,9 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, 
uint32_t ib_idx)
        uint32_t *size = &tmp;
        int i, r, idx = 0;
 
+       p->job->vm = NULL;
+       ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
+
        r = amdgpu_cs_sysvm_access_required(p);
        if (r)
                return r;
-- 
2.5.0

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