From: Dave Airlie <airl...@redhat.com>

These are all the ones required by the AMD display core.

Signed-off-by: Dave Airlie <airl...@redhat.com>
---
 include/drm/drm_dp_helper.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9d03f16..3d5910b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -400,6 +400,8 @@
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
 
+#define DP_ADJUST_REQUEST_POST_CURSOR2      0x20c
+
 #define DP_TEST_REQUEST                            0x218
 # define DP_TEST_LINK_TRAINING             (1 << 0)
 # define DP_TEST_LINK_VIDEO_PATTERN        (1 << 1)
@@ -415,6 +417,8 @@
 
 #define DP_TEST_PATTERN                            0x221
 
+#define DP_TEST_MISC1                       0x232
+
 #define DP_TEST_CRC_R_CR                   0x240
 #define DP_TEST_CRC_G_Y                            0x242
 #define DP_TEST_CRC_B_CB                   0x244
@@ -423,6 +427,18 @@
 # define DP_TEST_CRC_SUPPORTED             (1 << 5)
 # define DP_TEST_COUNT_MASK                0xf
 
+#define DP_TEST_PHY_PATTERN                 0x248
+#define DP_TEST_80BIT_CUSTOM_PATTERN_7_0    0x250
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_31_24  0x253
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_39_32  0x254
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_47_40  0x255
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_55_48  0x256
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_63_56  0x257
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_71_64  0x258
+#define        DP_TEST_80BIT_CUSTOM_PATTERN_79_72  0x259
+
 #define DP_TEST_RESPONSE                   0x260
 # define DP_TEST_ACK                       (1 << 0)
 # define DP_TEST_NAK                       (1 << 1)
@@ -443,6 +459,7 @@
 #define DP_SOURCE_OUI                      0x300
 #define DP_SINK_OUI                        0x400
 #define DP_BRANCH_OUI                      0x500
+#define DP_BRANCH_REVISION_START            0x509
 
 #define DP_SET_POWER                        0x600
 # define DP_SET_POWER_D0                    0x1
@@ -563,6 +580,9 @@
 #define DP_RECEIVER_ALPM_STATUS                    0x200b  /* eDP 1.4 */
 # define DP_ALPM_LOCK_TIMEOUT_ERROR        (1 << 0)
 
+#define DP_DP13_DPCD_REV                    0x2200
+#define DP_DP13_MAX_LINK_RATE               0x2201
+
 /* DP 1.2 Sideband message defines */
 /* peer device type - DP 1.2a Table 2-92 */
 #define DP_PEER_DEVICE_NONE            0x0
-- 
2.9.3

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to