From: Jack Xiao <jack.x...@amd.com>
Enable mes to map legacy queue support.
v2: drop unused gfx_v12_0_kiq_enable_kgq() (Alex)
Signed-off-by: Jack Xiao <jack.x...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 39 +++++++++++++++++++++----
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 25 ++--------------
2 files changed, 36 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 1d955652f3ba6..8e7cc44143857 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -623,10 +623,28 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int
xcc_id)
queue_mask |= (1ull <<
amdgpu_queue_mask_bit_to_set_resource_bit(adev, i));
}
- DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
- kiq_ring->queue);
amdgpu_device_flush_hdp(adev, NULL);
+ if (adev->enable_mes)
+ queue_mask = ~0ULL;
+
+ if (adev->enable_uni_mes) {
+ for (i = 0; i < adev->gfx.num_compute_rings; i++) {
+ j = i + xcc_id * adev->gfx.num_compute_rings;
+ r = amdgpu_mes_map_legacy_queue(adev,
+
&adev->gfx.compute_ring[j]);
+ if (r) {
+ DRM_ERROR("failed to map compute queue\n");
+ return r;
+ }
+ }
+
+ return 0;
+ }
+
+ DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
+ kiq_ring->queue);
+
spin_lock(&kiq->ring_lock);
r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
adev->gfx.num_compute_rings +
@@ -637,9 +655,6 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int
xcc_id)
return r;
}
- if (adev->enable_mes)
- queue_mask = ~0ULL;
-
kiq->pmf->kiq_set_resources(kiq_ring, queue_mask);
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
j = i + xcc_id * adev->gfx.num_compute_rings;
@@ -666,6 +681,20 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int
xcc_id)
amdgpu_device_flush_hdp(adev, NULL);
+ if (adev->enable_uni_mes) {
+ for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
+ j = i + xcc_id * adev->gfx.num_gfx_rings;
+ r = amdgpu_mes_map_legacy_queue(adev,
+ &adev->gfx.gfx_ring[j]);
+ if (r) {
+ DRM_ERROR("failed to map gfx queue\n");
+ return r;
+ }
+ }
+
+ return 0;
+ }
+
spin_lock(&kiq->ring_lock);
/* No need to map kcq on the slave */
if (amdgpu_gfx_is_master_xcc(adev, xcc_id)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 51955a4e47d59..3e2a6806f1c19 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -2707,28 +2707,6 @@ static int gfx_v12_0_gfx_init_queue(struct amdgpu_ring
*ring)
return 0;
}
-static int gfx_v12_0_kiq_enable_kgq(struct amdgpu_device *adev)
-{
- struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
- struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring;
- int r, i;
-
- if (!kiq->pmf || !kiq->pmf->kiq_map_queues)
- return -EINVAL;
-
- r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
- adev->gfx.num_gfx_rings);
- if (r) {
- DRM_ERROR("Failed to lock KIQ (%d).\n", r);
- return r;
- }
-
- for (i = 0; i < adev->gfx.num_gfx_rings; i++)
- kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.gfx_ring[i]);
-
- return amdgpu_ring_test_helper(kiq_ring);
-}
-
static int gfx_v12_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
{
int r, i;
@@ -2751,7 +2729,8 @@ static int gfx_v12_0_cp_async_gfx_ring_resume(struct
amdgpu_device *adev)
if (r)
goto done;
}
- r = gfx_v12_0_kiq_enable_kgq(adev);
+
+ r = amdgpu_gfx_enable_kgq(adev, 0);
if (r)
goto done;
--
2.44.0
