[PATCH 03/12] drm/amdgpu: remove dead code in sdma_v6_0_load_microcode

[Jesse Zhang]

Remove legacy method to load firmware mode, since that code cannot be reach.

Signed-off-by: Jesse Zhang <jesse.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 39 --------------------------
 1 file changed, 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index c833b6b8373b..b54b9cc2bf75 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
@@ -631,45 +631,6 @@ static int sdma_v6_0_load_microcode(struct amdgpu_device 
*adev)
                                msleep(1);
                        WREG32(sdma_v6_0_get_reg_offset(adev, 0, 
regSDMA0_BROADCAST_UCODE_DATA), le32_to_cpup(fw_data++));
                }
-       } else {
-               dev_info(adev->dev, "Use legacy method to load SDMA 
firmware\n");
-               for (i = 0; i < adev->sdma.num_instances; i++) {
-                       /* load Control Thread microcode */
-                       hdr = (const struct sdma_firmware_header_v2_0 
*)adev->sdma.instance[0].fw->data;
-                       amdgpu_ucode_print_sdma_hdr(&hdr->header);
-                       fw_size = le32_to_cpu(hdr->ctx_jt_offset + 
hdr->ctx_jt_size) / 4;
-
-                       fw_data = (const __le32 *)
-                               (adev->sdma.instance[0].fw->data +
-                                       
le32_to_cpu(hdr->header.ucode_array_offset_bytes));
-
-                       WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_ADDR), 0);
-
-                       for (j = 0; j < fw_size; j++) {
-                               if (amdgpu_emu_mode == 1 && j % 500 == 0)
-                                       msleep(1);
-                               WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
-                       }
-
-                       WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version);
-
-                       /* load Context Switch microcode */
-                       fw_size = le32_to_cpu(hdr->ctl_jt_offset + 
hdr->ctl_jt_size) / 4;
-
-                       fw_data = (const __le32 *)
-                               (adev->sdma.instance[0].fw->data +
-                                       le32_to_cpu(hdr->ctl_ucode_offset));
-
-                       WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_ADDR), 0x8000);
-
-                       for (j = 0; j < fw_size; j++) {
-                               if (amdgpu_emu_mode == 1 && j % 500 == 0)
-                                       msleep(1);
-                               WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
-                       }
-
-                       WREG32(sdma_v6_0_get_reg_offset(adev, i, 
regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version);
-               }
        }
 
        return 0;
-- 
2.25.1