From: Dillon Varone <dillon.var...@amd.com>

[WHY&HOW]
Update the idle hardmin with SMU if either clock changed.

Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Zaeem Mohamed <zaeem.moha...@amd.com>
Signed-off-by: Dillon Varone <dillon.var...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
index 28769deaad37..cd1c30fa783a 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
@@ -940,7 +940,7 @@ static unsigned int 
dcn401_build_update_bandwidth_clocks_sequence(
        }
 
        /* CLK_MGR401_UPDATE_IDLE_HARDMINS */
-       if (update_idle_uclk && is_idle_dpm_enabled) {
+       if ((update_idle_uclk || update_idle_fclk) && is_idle_dpm_enabled) {
                
block_sequence[num_steps].params.update_idle_hardmin_params.uclk_mhz = 
idle_uclk_mhz;
                
block_sequence[num_steps].params.update_idle_hardmin_params.fclk_mhz = 
idle_fclk_mhz;
                block_sequence[num_steps].func = 
CLK_MGR401_UPDATE_IDLE_HARDMINS;
-- 
2.34.1

Reply via email to