Reviewed-by: Aurabindo Pillai <aurabindo.pil...@amd.com>
On 6/26/24 2:31 PM, Marek Olšák wrote:
They were added accidentally.
Signed-off-by: Marek Olšák <marek.ol...@amd.com>
---
include/uapi/drm/drm_fourcc.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index d0063ac6e09f..4168445fbb8b 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -1540,9 +1540,6 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_SHIFT 18
#define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3
-#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3
-#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B,
1:128B, 2:256B */
-
/*
* DCC supports embedding some clear colors directly in the DCC surface.
* However, on older GPUs the rendering HW ignores the embedded clear color
--
--
Thanks & Regards,
Aurabindo Pillai
