Re: [PATCH 3/3] drm/amdgpu: add db size and offset range for VCN and VPE

[Sharma, Shashank]

On 06/01/2025 17:45, Saleemkhan Jamadar wrote:
VCN and VPE have different offset range, update the doorbell
offset range repsectively.
Doorbell size for VCN and VPE is 32bit.
Signed-off-by: Saleemkhan Jamadar<saleemkhan.jama...@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 15 +++++++++++++++
  1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index 769154223e2d..8c9a2f42116c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
@@ -222,6 +222,21 @@ amdgpu_userqueue_get_doorbell_index(struct 
amdgpu_userq_mgr *uq_mgr,
        }
  
  	db_size = sizeof(u64);
+       switch (db_info->queue_type) {
+               case AMDGPU_HW_IP_VCN_ENC:
+                       db_size = sizeof(u32);
+                       db_info->doorbell_offset += AMDGPU_NAVI10_DOORBELL64_VCN0_1 
<< 1;
+               break;
Please check on alignment with switch(case), checkpatch will get this 
one as well.
+
+               case AMDGPU_HW_IP_VPE:
+                       db_size = sizeof(u32);
+                       db_info->doorbell_offset += AMDGPU_NAVI10_DOORBELL64_VPE 
<< 1;
+               break;
+
+               default:
+                       /* FixMe : handle this after userqs are enabled for 
suported IPs */

Now I think you can add cases for GFX and SDMA IPs as well, set size to 
U64 and then return -EINVAL in case of IP not recognized (default).

- Shashank

+       }
+
        index = amdgpu_doorbell_index_on_bar(uq_mgr->adev, db_obj->obj,
                                             db_info->doorbell_offset, db_size);
        DRM_DEBUG_DRIVER("[Usermode queues] doorbell index=%lld\n", index);