> -----Original Message----- > From: amd-gfx [mailto:[email protected]] On Behalf > Of Rex Zhu > Sent: Friday, September 15, 2017 8:00 AM > To: [email protected] > Cc: Zhu, Rex > Subject: [PATCH] drm/amd/powerplay: Simplify smu7_voting_clients() > > Change-Id: I78533929e1bbd60d5dca0edbfc62a402ca5c1bd1 > Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 59 ++++++++--- > ------------- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | 9 +--- > 2 files changed, 19 insertions(+), 49 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > index 8fe9d87..4c603e5 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > @@ -388,6 +388,7 @@ static int smu7_enable_display_gap(struct pp_hwmgr > *hwmgr) > static int smu7_program_voting_clients(struct pp_hwmgr *hwmgr) > { > struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr- > >backend); > + int i; > > /* Clear reset for voting clients before enabling DPM */ > PHM_WRITE_INDIRECT_FIELD(hwmgr->device, > CGS_IND_REG__SMC, > @@ -395,50 +396,26 @@ static int smu7_program_voting_clients(struct > pp_hwmgr *hwmgr) > PHM_WRITE_INDIRECT_FIELD(hwmgr->device, > CGS_IND_REG__SMC, > SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 0); > > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_0, data- > >voting_rights_clients0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_1, data- > >voting_rights_clients1); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_2, data- > >voting_rights_clients2); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_3, data- > >voting_rights_clients3); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_4, data- > >voting_rights_clients4); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_5, data- > >voting_rights_clients5); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_6, data- > >voting_rights_clients6); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_7, data- > >voting_rights_clients7); > - > + for (i = 0; i < 8; i++) > + cgs_write_ind_register(hwmgr->device, > CGS_IND_REG__SMC, > + ixCG_FREQ_TRAN_VOTING_0 + i * 4, > + data->voting_rights_clients[i]); > return 0; > } > > static int smu7_clear_voting_clients(struct pp_hwmgr *hwmgr) > { > + int i; > + > /* Reset voting clients before disabling DPM */ > PHM_WRITE_INDIRECT_FIELD(hwmgr->device, > CGS_IND_REG__SMC, > SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 1); > PHM_WRITE_INDIRECT_FIELD(hwmgr->device, > CGS_IND_REG__SMC, > SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 1); > > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_0, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_1, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_2, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_3, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_4, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_5, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_6, 0); > - cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, > - ixCG_FREQ_TRAN_VOTING_7, 0); > + for (i = 0; i < 8; i++) > + cgs_write_ind_register(hwmgr->device, > CGS_IND_REG__SMC, > + ixCG_FREQ_TRAN_VOTING_0 + i * 4, 0); > > return 0; > } > @@ -1384,14 +1361,14 @@ static void smu7_init_dpm_defaults(struct > pp_hwmgr *hwmgr) > data->vddc_vddgfx_delta = 300; > data->static_screen_threshold = > SMU7_STATICSCREENTHRESHOLD_DFLT; > data->static_screen_threshold_unit = > SMU7_STATICSCREENTHRESHOLDUNIT_DFLT; > - data->voting_rights_clients0 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT0; > - data->voting_rights_clients1 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT1; > - data->voting_rights_clients2 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT2; > - data->voting_rights_clients3 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT3; > - data->voting_rights_clients4 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT4; > - data->voting_rights_clients5 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT5; > - data->voting_rights_clients6 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT6; > - data->voting_rights_clients7 = > SMU7_VOTINGRIGHTSCLIENTS_DFLT7; > + data->voting_rights_clients[0] = > SMU7_VOTINGRIGHTSCLIENTS_DFLT0; > + data->voting_rights_clients[1]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT1; > + data->voting_rights_clients[2] = > SMU7_VOTINGRIGHTSCLIENTS_DFLT2; > + data->voting_rights_clients[3]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT3; > + data->voting_rights_clients[4]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT4; > + data->voting_rights_clients[5]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT5; > + data->voting_rights_clients[6]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT6; > + data->voting_rights_clients[7]= > SMU7_VOTINGRIGHTSCLIENTS_DFLT7; > > data->mclk_dpm_key_disabled = hwmgr->feature_mask & > PP_MCLK_DPM_MASK ? false : true; > data->sclk_dpm_key_disabled = hwmgr->feature_mask & > PP_SCLK_DPM_MASK ? false : true; > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h > index f221e17..e021154 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h > @@ -182,14 +182,7 @@ struct smu7_hwmgr { > struct smu7_dpm_table dpm_table; > struct smu7_dpm_table golden_dpm_table; > > - uint32_t > voting_rights_clients0; > - uint32_t > voting_rights_clients1; > - uint32_t > voting_rights_clients2; > - uint32_t > voting_rights_clients3; > - uint32_t > voting_rights_clients4; > - uint32_t > voting_rights_clients5; > - uint32_t > voting_rights_clients6; > - uint32_t > voting_rights_clients7; > + uint32_t > voting_rights_clients[8]; > uint32_t > static_screen_threshold_unit; > uint32_t > static_screen_threshold; > uint32_t > voltage_control; > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
