On Thu, Sep 11, 2025 at 1:14 PM Shaoyun Liu <[email protected]> wrote:
>
> MES pipe0 will do VM invalidation with engine set 5 when assign VMID to a
> process,
> driver will submit inv_tlb package to mes pipe1. It might run into race
> condition
> if both pipes use the same invalidate engine set. From MES version 0x83 it
> will use
> invalidate engine set 6 for pipe1 to fix the issue
>
> Signed-off-by: Shaoyun Liu <[email protected]>
Fixes: 87e65052616c ("drm/amd/amdgpu : Use the MES INV_TLBS API for
tlb invalidation on gfx12")
Acked-by: Alex Deucher <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
> index 76d3c40735b0..7cc16af1868b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
> @@ -337,7 +337,7 @@ static void gmc_v12_0_flush_gpu_tlb_pasid(struct
> amdgpu_device *adev,
> int vmid, i;
>
> if (adev->enable_uni_mes &&
> adev->mes.ring[AMDGPU_MES_SCHED_PIPE].sched.ready &&
> - (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x81) {
> + (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x83) {
> struct mes_inv_tlbs_pasid_input input = {0};
> input.pasid = pasid;
> input.flush_type = flush_type;
> --
> 2.34.1
>
