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On Fri, Sep 26, 2025 at 7:44 PM Alex Deucher <[email protected]> wrote: > > Chips which use the IP discovery firmware loaded by the driver > reported incorrect harvesting information in the ip discovery > table in sysfs because the driver only uses the ip discovery > firmware for populating sysfs and not for direct parsing for the > driver itself as such, the fields that are used to print the > harvesting info in sysfs report incorrect data for some IPs. Populate > the relevant fields for this case as well. > > Fixes: 514678da56da ("drm/amdgpu/discovery: fix fw based ip discovery") > Cc: Tom St Denis <[email protected]> > Signed-off-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 73401f0aeb346..dd7b2b796427c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1033,7 +1033,9 @@ static uint8_t amdgpu_discovery_get_harvest_info(struct > amdgpu_device *adev, > /* Until a uniform way is figured, get mask based on hwid */ > switch (hw_id) { > case VCN_HWID: > - harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; > + /* VCN vs UVD+VCE */ > + if (!amdgpu_ip_version(adev, VCE_HWIP, 0)) > + harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; > break; > case DMU_HWID: > if (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK) > @@ -2565,7 +2567,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device > *adev) > amdgpu_discovery_init(adev); > vega10_reg_base_init(adev); > adev->sdma.num_instances = 2; > + adev->sdma.sdma_mask = 3; > adev->gmc.num_umc = 4; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); > @@ -2592,7 +2596,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device > *adev) > amdgpu_discovery_init(adev); > vega10_reg_base_init(adev); > adev->sdma.num_instances = 2; > + adev->sdma.sdma_mask = 3; > adev->gmc.num_umc = 4; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); > @@ -2619,8 +2625,10 @@ int amdgpu_discovery_set_ip_blocks(struct > amdgpu_device *adev) > amdgpu_discovery_init(adev); > vega10_reg_base_init(adev); > adev->sdma.num_instances = 1; > + adev->sdma.sdma_mask = 1; > adev->vcn.num_vcn_inst = 1; > adev->gmc.num_umc = 2; > + adev->gfx.xcc_mask = 1; > if (adev->apu_flags & AMD_APU_IS_RAVEN2) { > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, > 0); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, > 0); > @@ -2665,7 +2673,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device > *adev) > amdgpu_discovery_init(adev); > vega20_reg_base_init(adev); > adev->sdma.num_instances = 2; > + adev->sdma.sdma_mask = 3; > adev->gmc.num_umc = 8; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); > @@ -2693,8 +2703,10 @@ int amdgpu_discovery_set_ip_blocks(struct > amdgpu_device *adev) > amdgpu_discovery_init(adev); > arct_reg_base_init(adev); > adev->sdma.num_instances = 8; > + adev->sdma.sdma_mask = 0xff; > adev->vcn.num_vcn_inst = 2; > adev->gmc.num_umc = 8; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); > @@ -2726,8 +2738,10 @@ int amdgpu_discovery_set_ip_blocks(struct > amdgpu_device *adev) > amdgpu_discovery_init(adev); > aldebaran_reg_base_init(adev); > adev->sdma.num_instances = 5; > + adev->sdma.sdma_mask = 0x1f; > adev->vcn.num_vcn_inst = 2; > adev->gmc.num_umc = 4; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); > @@ -2762,6 +2776,8 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device > *adev) > } else { > cyan_skillfish_reg_base_init(adev); > adev->sdma.num_instances = 2; > + adev->sdma.sdma_mask = 3; > + adev->gfx.xcc_mask = 1; > adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(2, 0, > 3); > adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(2, 0, > 3); > adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(5, 0, > 1); > -- > 2.51.0 >
