On 12.09.25 13:11, Srinivasan Shanmugam wrote: > MMIO_REMAP (HDP flush page) is a hardware I/O window exposed via a PCI > BAR. It must not migrate or be evicted. > > Allocate a single 4 KB GEM BO in AMDGPU_GEM_DOMAIN_MMIO_REMAP during TTM > initialization when the hardware exposes a remap bus address and the > host page size is <= 4 KiB. Reserve the BO and pin it at the TTM level > so it remains fixed for its lifetime. No CPU mapping is established > here. > > On teardown, reserve, unpin, and free the BO if present. > > This prepares the object to be shared (e.g., via dma-buf) without > triggering placement changes or no CPU-access migration > > Suggested-by: Christian König <[email protected]> > Suggested-by: Alex Deucher <[email protected]> > Signed-off-by: Srinivasan Shanmugam <[email protected]>
Reviewed-by: Christian König <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index f38bc9542cd6..5ce7c8b9ff39 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -1862,6 +1862,10 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device > *adev) > * hardware exposes a remap base (adev->rmmio_remap.bus_addr) and the host > * PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K). The BO is created as a regular > * GEM object (amdgpu_bo_create). > + * > + * The BO is created as a normal GEM object via amdgpu_bo_create(), then > + * reserved and pinned at the TTM level (ttm_bo_pin()) so it can never be > + * migrated or evicted. No CPU mapping is established here. > * > * Return: > * * 0 on success or intentional skip (feature not present/unsupported) > @@ -1891,7 +1895,25 @@ static int amdgpu_ttm_mmio_remap_bo_init(struct > amdgpu_device *adev) > if (r) > return r; > > + r = amdgpu_bo_reserve(adev->rmmio_remap.bo, true); > + if (r) > + goto err_unref; > + > + /* > + * MMIO_REMAP is a fixed I/O placement (AMDGPU_PL_MMIO_REMAP). > + * Use TTM-level pin so the BO cannot be evicted/migrated, > + * independent of GEM domains. This > + * enforces the “fixed I/O window” > + */ > + ttm_bo_pin(&adev->rmmio_remap.bo->tbo); > + > + amdgpu_bo_unreserve(adev->rmmio_remap.bo); > return 0; > + > +err_unref: > + amdgpu_bo_unref(&adev->rmmio_remap.bo); > + adev->rmmio_remap.bo = NULL; > + return r; > } > > /** > @@ -1903,6 +1925,10 @@ static int amdgpu_ttm_mmio_remap_bo_init(struct > amdgpu_device *adev) > */ > static void amdgpu_ttm_mmio_remap_bo_fini(struct amdgpu_device *adev) > { > + if (!amdgpu_bo_reserve(adev->rmmio_remap.bo, true)) { > + ttm_bo_unpin(&adev->rmmio_remap.bo->tbo); > + amdgpu_bo_unreserve(adev->rmmio_remap.bo); > + } > amdgpu_bo_unref(&adev->rmmio_remap.bo); > adev->rmmio_remap.bo = NULL; > }
