On Tue, Oct 14, 2025 at 4:21 PM Ellen Pan <[email protected]> wrote: > > 1. Added enum amd_sriov_crit_region_version to support multi versions > 2. Added logic in SRIOV mailbox to regonize crit_region version during > req_gpu_init_data > > Signed-off-by: Ellen Pan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 5 +++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 8 +++++++ > drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 5 +++++ > drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 23 ++++++++++++++------- > 4 files changed, 32 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > index e95adf0407a0..39ab7d00379b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > @@ -150,9 +150,10 @@ void amdgpu_virt_request_init_data(struct amdgpu_device > *adev) > virt->ops->req_init_data(adev); > > if (adev->virt.req_init_data_ver > 0) > - DRM_INFO("host supports REQ_INIT_DATA handshake\n"); > + dev_info(adev->dev, "host supports REQ_INIT_DATA handshake of > critical_region_version %d\n", > + adev->virt.req_init_data_ver); > else > - DRM_WARN("host doesn't support REQ_INIT_DATA handshake\n"); > + dev_warn(adev->dev, "host doesn't support REQ_INIT_DATA > handshake\n"); > } > > /** > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h > index d1172c8e58c4..36247a160aa6 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h > @@ -262,6 +262,11 @@ struct amdgpu_virt_ras { > > DECLARE_ATTR_CAP_CLASS(amdgpu_virt, AMDGPU_VIRT_CAPS_LIST); > > +struct amdgpu_virt_region { > + uint32_t offset; > + uint32_t size_kb; > +}; > + > /* GPU virtualization */ > struct amdgpu_virt { > uint32_t caps; > @@ -289,6 +294,9 @@ struct amdgpu_virt { > bool ras_init_done; > uint32_t reg_access; > > + /* dynamic(v2) critical regions */ > + struct amdgpu_virt_region init_data_header; > + > /* vf2pf message */ > struct delayed_work vf2pf_work; > uint32_t vf2pf_update_interval_ms; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h > b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h > index 3b35154e2df6..b53caab5b706 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h > @@ -65,6 +65,11 @@ > (AMD_SRIOV_MSG_VBIOS_SIZE_KB_V1 + > AMD_SRIOV_MSG_DATAEXCHANGE_SIZE_KB_V1 + \ > AMD_SRIOV_MSG_RAS_TELEMETRY_SIZE_KB_V1) > > +enum amd_sriov_crit_region_version { > + GPU_CRIT_REGION_V1 = 1, > + GPU_CRIT_REGION_V2 = 2, > +}; > + > /* > * PF2VF history log: > * v1 defined in amdgim > diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c > b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c > index e5282a5d05d9..cd5b2f07edb8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c > +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c > @@ -222,12 +222,20 @@ static int > xgpu_nv_send_access_requests_with_param(struct amdgpu_device *adev, > adev->virt.req_init_data_ver = 0; > } else { > if (req == IDH_REQ_GPU_INIT_DATA) { > - adev->virt.req_init_data_ver = > - > RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW1); > - > - /* assume V1 in case host doesn't set version > number */ > - if (adev->virt.req_init_data_ver < 1) > - adev->virt.req_init_data_ver = 1; > + switch > (RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW1)) { > + case GPU_CRIT_REGION_V2: > + adev->virt.req_init_data_ver = > GPU_CRIT_REGION_V2; > + adev->virt.init_data_header.offset = > + > RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW2); > + adev->virt.init_data_header.size_kb = > + > RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW3); > + break; > + default: > + adev->virt.req_init_data_ver = > GPU_CRIT_REGION_V1; > + adev->virt.init_data_header.offset = > -1; > + adev->virt.init_data_header.size_kb = > 0; > + break; > + } > } > } > > @@ -285,7 +293,8 @@ static int xgpu_nv_release_full_gpu_access(struct > amdgpu_device *adev, > > static int xgpu_nv_request_init_data(struct amdgpu_device *adev) > { > - return xgpu_nv_send_access_requests(adev, IDH_REQ_GPU_INIT_DATA); > + return xgpu_nv_send_access_requests_with_param(adev, > IDH_REQ_GPU_INIT_DATA, > + 0, GPU_CRIT_REGION_V2, 0); > } > > static int xgpu_nv_mailbox_ack_irq(struct amdgpu_device *adev, > -- > 2.34.1 >
