[Public]
Hi all,
This week this patchset was tested on 4 systems, two dGPU and two APU based,
and tested across multiple display and connection types.
APU
* Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k
240hz (Includes USB-C to DP/HDMI adapters)
* Thunderbolt -> LG Ultrafine 5k
* MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz
displays, HP Hook G2 with 2x 4k60hz displays
* USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP
and 1x 4k60hz HDMI displays
* SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution
supported by the dongle of 4k 120hz YUV420 12bpc.
* MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the
adapter of 4k 120hz RGB 8bpc.
DGPU
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multiple Display DP -> 4k240hz + 4k144hz
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
* MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz
displays)
The testing is a mix of automated and manual tests. Manual testing includes
(but is not limited to)
* Changing display configurations and settings
* Video/Audio playback
* Benchmark testing
* Suspend/Resume testing
* Feature testing (Freesync, HDCP, etc.)
Automated testing includes (but is not limited to)
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The testing is mainly tested on the following displays, but occasionally there
are tests with other displays
* Samsung G8 Neo 4k240hz
* Samsung QN55QN95B 4k 120hz
* Acer XV322QKKV 4k144hz
* HP U27 4k Wireless 4k60hz
* LG 27UD58B 4k60hz
* LG 32UN650WA 4k60hz
* LG Ultrafine 5k 5k60hz
* AU Optronics B140HAN01.1 1080p 60hz eDP
* AU Optronics B160UAN01.J 1920x1200 165hz eDP
* Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP
The patchset consists of the amd-staging-drm-next branch (Head commit -
1880960e845adaa5a356e4ce3572f1e4c221c529 -> drm/amdgpu: Use kmalloc_array()
instead of kmalloc()) with new patches added on top of it.
Tested on Ubuntu 24.04.3, on Wayland and X11, using Gnome.
Tested-by: Dan Wheeler <[email protected]>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: [email protected] <[email protected]>
Sent: Wednesday, September 24, 2025 2:22 PM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo)
<[email protected]>; Pillai, Aurabindo <[email protected]>; Li, Roman
<[email protected]>; Lin, Wayne <[email protected]>; Chung, ChiaHsuan (Tom)
<[email protected]>; Zuo, Jerry <[email protected]>; Wheeler, Daniel
<[email protected]>; Wu, Ray <[email protected]>; LIPSKI, IVAN
<[email protected]>; Hung, Alex <[email protected]>; Li, Roman
<[email protected]>
Subject: [PATCH 00/10] DC Patches September 24, 2025
From: Roman Li <[email protected]>
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fix slice width calculation for YCbCr420
* Fix DTBCLK gating
* Use NRD cap as lttpr cap
* Consolidate DML2 FP guards
* DML2.1 Update
* Firmware Release 0.1.29.0 changes
Cc: Daniel Wheeler <[email protected]>
Austin Zheng (1):
drm/amd/display: DML2.1 Reintegration
Fangzhi Zuo (1):
drm/amd/display: Prevent Gating DTBCLK before It Is Properly Latched
Ivan Lipski (1):
drm/amd/display: Consolidate two DML2 FP guards
Nicholas Kazlauskas (3):
drm/amd/display: Support possibly NULL link for should_use_dmub_lock
drm/amd/display: Rename should_use_dmub_lock to reflect inbox1 usage
drm/amd/display: Rename FAMS2 global control lock to DMUB HW control
lock
Peichen Huang (1):
drm/amd/display: lttpr cap should be nrd cap in bw_alloc mode
Relja Vojvodic (1):
drm/amd/display: Correct slice width calculation for YCbCr420
Taimur Hassan (2):
drm/amd/display: [FW Promotion] Release 0.1.29.0
drm/amd/display: Promote DC to 3.2.352
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 4 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 33 +-
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 24 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c | 2 +-
.../drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 29 +-
.../drm/amd/display/dc/dce/dmub_hw_lock_mgr.h | 10 +-
.../amd/display/dc/dml2/dml21/dml21_wrapper.c | 2 -
.../dml21/inc/dml_top_display_cfg_types.h | 11 +
.../dml21/inc/dml_top_soc_parameter_types.h | 7 +-
.../display/dc/dml2/dml21/inc/dml_top_types.h | 13 +
.../src/dml2_core/dml2_core_dcn4_calcs.c | 55 ++-
.../dml21/src/dml2_core/dml2_core_factory.c | 2 +
.../src/dml2_core/dml2_core_shared_types.h | 10 +-
.../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 459 +++++++++---------
.../src/inc/dml2_internal_shared_types.h | 36 +-
.../drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dsc/dsc.h | 1 +
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 2 +-
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +-
.../amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 1 +
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 1 +
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 1 +
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 18 +-
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 4 +-
.../amd/display/dc/hwss/dcn401/dcn401_init.c | 4 +-
.../drm/amd/display/dc/hwss/hw_sequencer.h | 10 +-
.../display/dc/link/accessories/link_dp_cts.c | 4 +-
.../gpu/drm/amd/display/dc/link/link_dpms.c | 2 +
.../dc/link/protocols/link_dp_capability.c | 38 +-
.../dc/resource/dcn20/dcn20_resource.c | 1 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 204 +++++++-
32 files changed, 663 insertions(+), 331 deletions(-)
--
2.34.1
