[Public]

Regards,
      Prike

> -----Original Message-----
> From: Alex Deucher <[email protected]>
> Sent: Monday, October 13, 2025 9:44 PM
> To: Liang, Prike <[email protected]>
> Cc: Deucher, Alexander <[email protected]>; amd-
> [email protected]
> Subject: Re: [PATCH 3/7] drm/amdgpu/gfx: add eop size and alignment to shadow
> info
>
> On Mon, Oct 13, 2025 at 4:54 AM Liang, Prike <[email protected]> wrote:
> >
> > [Public]
> >
> > We may need to update the userspace EOP buffer request; otherwise, the EOP
> buffer validation may fail.
>
> Existing userspace should be ok.  It currently uses PAGE_SIZE which is larger 
> than
> 2048.
The mesa uses the EOP size as max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE) which 
is sees larger than 2048, so the kernel validates the eop buffer can be 
successful at this point.

But the mesa may need to use the shadow_info->eop_size as well in the future?

> > Per this kernel change: Reviewed-by: Prike Liang <[email protected]>
>
> Thanks!
>
> Alex
>
> >
> > Regards,
> >       Prike
> >
> > > -----Original Message-----
> > > From: amd-gfx <[email protected]> On Behalf Of
> > > Alex Deucher
> > > Sent: Saturday, October 11, 2025 5:15 AM
> > > To: [email protected]
> > > Cc: Deucher, Alexander <[email protected]>
> > > Subject: [PATCH 3/7] drm/amdgpu/gfx: add eop size and alignment to
> > > shadow info
> > >
> > > This is used by firmware for compute user queues.
> > >
> > > Signed-off-by: Alex Deucher <[email protected]>
> > > ---
> > >  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 ++
> > > drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c  | 4 ++++
> > > drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c  | 4 ++++
> > >  3 files changed, 10 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> > > index fb5f7a0ee029f..7109a2ad9ec36 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> > > @@ -328,6 +328,8 @@ struct amdgpu_gfx_shadow_info {
> > >       u32 shadow_alignment;
> > >       u32 csa_size;
> > >       u32 csa_alignment;
> > > +     u32 eop_size;
> > > +     u32 eop_alignment;
> > >  };
> > >
> > >  struct amdgpu_gfx_funcs {
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > > b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > > index 6f4c2e746165e..9c79bfa4f1ef6 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > > @@ -1052,10 +1052,14 @@ static void
> > > gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev,  static void
> > > gfx_v11_0_get_gfx_shadow_info_nocheck(struct
> > > amdgpu_device *adev,
> > >                                        struct amdgpu_gfx_shadow_info
> > > *shadow_info)  {
> > > +     /* for gfx */
> > >       shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
> > >       shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
> > >       shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
> > >       shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
> > > +     /* for compute */
> > > +     shadow_info->eop_size = GFX11_MEC_HPD_SIZE;
> > > +     shadow_info->eop_alignment = 256;
> > >  }
> > >
> > >  static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device
> > > *adev, diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> > > b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> > > index 453e4034389f2..fd37f2355f86e 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> > > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> > > @@ -909,10 +909,14 @@ static void gfx_v12_0_select_me_pipe_q(struct
> > > amdgpu_device *adev,  static void
> > > gfx_v12_0_get_gfx_shadow_info_nocheck(struct
> > > amdgpu_device *adev,
> > >                                                 struct
> > > amdgpu_gfx_shadow_info
> > > *shadow_info)  {
> > > +     /* for gfx */
> > >       shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
> > >       shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
> > >       shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
> > >       shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
> > > +     /* for compute */
> > > +     shadow_info->eop_size = GFX12_MEC_HPD_SIZE;
> > > +     shadow_info->eop_alignment = 256;
> > >  }
> > >
> > >  static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device
> > > *adev,
> > > --
> > > 2.51.0
> >

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