[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Prike Liang <[email protected]>
Regards,
Prike
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Alex
> Deucher
> Sent: Tuesday, October 14, 2025 12:14 AM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>
> Subject: [PATCH 2/6] drm/amdgpu/gfx: add eop size and alignment to shadow info
>
> This is used by firmware for compute user queues.
>
> Signed-off-by: Alex Deucher <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++++
> drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 4 ++++
> 3 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> index fb5f7a0ee029f..7109a2ad9ec36 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> @@ -328,6 +328,8 @@ struct amdgpu_gfx_shadow_info {
> u32 shadow_alignment;
> u32 csa_size;
> u32 csa_alignment;
> + u32 eop_size;
> + u32 eop_alignment;
> };
>
> struct amdgpu_gfx_funcs {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index d61eb9f187c64..001ffe3820be2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -1052,10 +1052,14 @@ static void gfx_v11_0_select_me_pipe_q(struct
> amdgpu_device *adev, static void gfx_v11_0_get_gfx_shadow_info_nocheck(struct
> amdgpu_device *adev,
> struct amdgpu_gfx_shadow_info
> *shadow_info) {
> + /* for gfx */
> shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
> shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
> shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
> shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
> + /* for compute */
> + shadow_info->eop_size = GFX11_MEC_HPD_SIZE;
> + shadow_info->eop_alignment = 256;
> }
>
> static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev, diff
> --git
> a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index 93fde0f9af87f..f067ad4146454 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -909,10 +909,14 @@ static void gfx_v12_0_select_me_pipe_q(struct
> amdgpu_device *adev, static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct
> amdgpu_device *adev,
> struct amdgpu_gfx_shadow_info
> *shadow_info) {
> + /* for gfx */
> shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
> shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
> shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
> shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
> + /* for compute */
> + shadow_info->eop_size = GFX12_MEC_HPD_SIZE;
> + shadow_info->eop_alignment = 256;
> }
>
> static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev,
> --
> 2.51.0
