On Thu, Oct 16, 2025 at 01:55:27PM -0500, Mario Limonciello wrote: > [Why] > Newer VPE microcode has functionality that will decrease DPM level > only when a workload has run for 2 or more seconds. If VPE is turned > off before this DPM decrease and the PMFW doesn't reset it when > power gating VPE, the SOC can get stuck with a higher DPM level. > > This can happen from amdgpu's ring buffer test because it's a short > quick workload for VPE and VPE is turned off after 1s. > > [How] > In idle handler besides checking fences are drained check PMFW version > to determine if it will reset DPM when power gating VPE. If PMFW will > not do this, then check VPE DPM level. If it is not DPM0 reschedule > delayed work again until it is. > > Cc: [email protected] > Reported-by: Sultan Alsawaf <[email protected]> > Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4615 > Signed-off-by: Mario Limonciello <[email protected]>
Reviewed-and-tested-by: Sultan Alsawaf <[email protected]> Thanks again for fixing this. Sultan
