Compact some very long and repetitive lines of code by caching the respective object in local variables. This is a concept which is already used at places, but not consistently so.
add/remove: 0/0 grow/shrink: 0/7 up/down: 0/-246 (-246) Function old new delta vcn_v2_0_dec_ring_insert_nop 200 198 -2 vcn_v2_0_dec_ring_insert_start 272 257 -15 vcn_v2_0_dec_ring_emit_wreg 402 373 -29 vcn_v2_0_dec_ring_test_ring 457 422 -35 vcn_v2_0_dec_ring_emit_ib 571 530 -41 vcn_v2_0_dec_ring_emit_reg_wait 536 492 -44 vcn_v2_0_dec_ring_emit_fence 938 858 -80 Total: Before=8977605, After=8977359, chg -0.00% Signed-off-by: Tvrtko Ursulin <[email protected]> --- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 71 +++++++++++++++------------ 1 file changed, 40 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c index 850aa5fb4e13..eca5e25093db 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c @@ -1479,11 +1479,12 @@ static void vcn_v2_0_dec_ring_set_wptr(struct amdgpu_ring *ring) */ void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data0, 0)); amdgpu_ring_write(ring, 0); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1)); } @@ -1512,13 +1513,14 @@ void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring) */ void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; int i; WARN_ON(ring->wptr % 2 || count % 2); for (i = 0; i < count / 2; i++) { - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.nop, 0)); + amdgpu_ring_write(ring, PACKET0(internal->nop, 0)); amdgpu_ring_write(ring, 0); } } @@ -1536,28 +1538,30 @@ void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.context_id, 0)); + + amdgpu_ring_write(ring, PACKET0(internal->context_id, 0)); amdgpu_ring_write(ring, seq); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data0, 0)); amdgpu_ring_write(ring, addr & 0xffffffff); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data1, 0)); amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_FENCE << 1)); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data0, 0)); amdgpu_ring_write(ring, 0); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data1, 0)); amdgpu_ring_write(ring, 0); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_TRAP << 1)); } @@ -1577,35 +1581,37 @@ void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib, uint32_t flags) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; unsigned vmid = AMDGPU_JOB_GET_VMID(job); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_vmid, 0)); + amdgpu_ring_write(ring, PACKET0(internal->ib_vmid, 0)); amdgpu_ring_write(ring, vmid); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_bar_low, 0)); + amdgpu_ring_write(ring, PACKET0(internal->ib_bar_low, 0)); amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_bar_high, 0)); + amdgpu_ring_write(ring, PACKET0(internal->ib_bar_high, 0)); amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_size, 0)); + amdgpu_ring_write(ring, PACKET0(internal->ib_size, 0)); amdgpu_ring_write(ring, ib->length_dw); } void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data0, 0)); amdgpu_ring_write(ring, reg << 2); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data1, 0)); amdgpu_ring_write(ring, val); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.gp_scratch8, 0)); + amdgpu_ring_write(ring, PACKET0(internal->gp_scratch8, 0)); amdgpu_ring_write(ring, mask); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_REG_READ_COND_WAIT << 1)); } @@ -1628,15 +1634,16 @@ void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = + &ring->adev->vcn.inst[ring->me].internal; - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data0, 0)); amdgpu_ring_write(ring, reg << 2); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0)); + amdgpu_ring_write(ring, PACKET0(internal->data1, 0)); amdgpu_ring_write(ring, val); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_WRITE_REG << 1)); } @@ -1826,6 +1833,8 @@ static int vcn_v2_0_process_interrupt(struct amdgpu_device *adev, int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring) { struct amdgpu_device *adev = ring->adev; + struct amdgpu_vcn_reg *internal = &adev->vcn.inst[ring->me].internal; + struct amdgpu_vcn_reg *external = &adev->vcn.inst[ring->me].external; uint32_t tmp = 0; unsigned i; int r; @@ -1833,17 +1842,17 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring) if (amdgpu_sriov_vf(adev)) return 0; - WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); + WREG32(external->scratch9, 0xCAFEDEAD); r = amdgpu_ring_alloc(ring, 4); if (r) return r; - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0)); + amdgpu_ring_write(ring, PACKET0(internal->cmd, 0)); amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1)); - amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.scratch9, 0)); + amdgpu_ring_write(ring, PACKET0(internal->scratch9, 0)); amdgpu_ring_write(ring, 0xDEADBEEF); amdgpu_ring_commit(ring); for (i = 0; i < adev->usec_timeout; i++) { - tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9); + tmp = RREG32(external->scratch9); if (tmp == 0xDEADBEEF) break; udelay(1); -- 2.48.0
