[AMD Official Use Only - AMD Internal Distribution Only] The series is:
Reviewed-by: Tao Zhou <[email protected]> > -----Original Message----- > From: Chai, Thomas <[email protected]> > Sent: Friday, October 31, 2025 3:05 PM > To: [email protected] > Cc: Zhang, Hawking <[email protected]>; Zhou1, Tao > <[email protected]>; Li, Candice <[email protected]>; Wang, Yang(Kevin) > <[email protected]>; Yang, Stanley <[email protected]>; Su, Joe > <[email protected]>; Chai, Thomas <[email protected]> > Subject: [PATCH 1/2] drm/amd/ras: Increase ras switch control range > > Increase ras switch control range. > > Signed-off-by: YiPeng Chai <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 3 +++ > .../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 25 ++++++++++++++----- > 2 files changed, 22 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h > index 556cf4d7b5ef..40c0bf85f1d3 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h > @@ -591,6 +591,9 @@ struct amdgpu_ras { > > /* Protect poison injection */ > struct mutex poison_lock; > + > + /* Disable/Enable uniras switch */ > + bool uniras_enabled; > }; > > struct ras_fs_data { > diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c > b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c > index 8007e49951d8..e1f6db13c55f 100644 > --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c > +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c > @@ -283,6 +283,18 @@ static int amdgpu_ras_mgr_sw_init(struct > amdgpu_ip_block *ip_block) > struct amdgpu_ras_mgr *ras_mgr; > int ret = 0; > > + /* Disabled by default */ > + con->uniras_enabled = false; > + > + /* Enabled only in debug mode */ > + if (adev->debug_enable_ras_aca) { > + con->uniras_enabled = true; > + RAS_DEV_INFO(adev, "Debug amdgpu uniras!"); > + } > + > + if (!con->uniras_enabled) > + return 0; > + > ras_mgr = kzalloc(sizeof(*ras_mgr), GFP_KERNEL); > if (!ras_mgr) > return -EINVAL; > @@ -315,6 +327,9 @@ static int amdgpu_ras_mgr_sw_fini(struct amdgpu_ip_block > *ip_block) > struct amdgpu_ras *con = amdgpu_ras_get_context(adev); > struct amdgpu_ras_mgr *ras_mgr = (struct amdgpu_ras_mgr *)con- > >ras_mgr; > > + if (!con->uniras_enabled) > + return 0; > + > if (!ras_mgr) > return 0; > > @@ -332,12 +347,11 @@ static int amdgpu_ras_mgr_sw_fini(struct > amdgpu_ip_block *ip_block) static int amdgpu_ras_mgr_hw_init(struct > amdgpu_ip_block *ip_block) { > struct amdgpu_device *adev = ip_block->adev; > + struct amdgpu_ras *con = amdgpu_ras_get_context(adev); > struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev); > int ret; > > - /* Currently only debug mode can enable the ras module > - */ > - if (!adev->debug_enable_ras_aca) > + if (!con->uniras_enabled) > return 0; > > if (!ras_mgr || !ras_mgr->ras_core) > @@ -360,11 +374,10 @@ static int amdgpu_ras_mgr_hw_init(struct > amdgpu_ip_block *ip_block) static int amdgpu_ras_mgr_hw_fini(struct > amdgpu_ip_block *ip_block) { > struct amdgpu_device *adev = ip_block->adev; > + struct amdgpu_ras *con = amdgpu_ras_get_context(adev); > struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev); > > - /* Currently only debug mode can enable the ras module > - */ > - if (!adev->debug_enable_ras_aca) > + if (!con->uniras_enabled) > return 0; > > if (!ras_mgr || !ras_mgr->ras_core) > -- > 2.34.1
