Enable the soft IRQ handler ring on SI, CIK, VI and delegate the processing of all VM faults to the soft IRQ handler ring.
Why? On old GPUs, it may be an issue that handling the interrupts from VM faults is too slow and the interrupt handler (IH) ring may overflow, which can cause an eventual hang. This is a concern especially on SI and CIK where there are some HW limitations regarding robustness features with some shader instructions, which in practice means that users can see thousands of VM faults during normal gaming use even when the game or the UMD don't do anything wrong. With this series, we spend much less time in the IRQ handler that interacts with the HW IH ring, which significantly reduces the chance of hangs. There are also a few misc improvements to the GMC v6 code. Timur Kristóf (10): drm/amdgpu/si_ih: Enable soft IRQ handler ring drm/amdgpu/cik_ih: Enable soft IRQ handler ring drm/amdgpu/iceland_ih: Enable soft IRQ handler ring drm/amdgpu/tonga_ih: Enable soft IRQ handler ring drm/amdgpu/cz_ih: Enable soft IRQ handler ring drm/amdgpu/gmc6: Don't print MC client as it's unknown drm/amdgpu/gmc6: Cache VM fault info drm/amdgpu/gmc6: Delegate VM faults to soft IRQ handler ring drm/amdgpu/gmc7: Delegate VM faults to soft IRQ handler ring drm/amdgpu/gmc8: Delegate VM faults to soft IRQ handler ring drivers/gpu/drm/amd/amdgpu/cik_ih.c | 12 ++++++++++++ drivers/gpu/drm/amd/amdgpu/cz_ih.c | 10 ++++++++++ drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 20 ++++++++++++++------ drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 6 ++++++ drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 ++++++ drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 10 ++++++++++ drivers/gpu/drm/amd/amdgpu/si_ih.c | 12 ++++++++++++ drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 10 ++++++++++ 8 files changed, 80 insertions(+), 6 deletions(-) -- 2.51.1
