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Reviewed-by: Jesse Zhang <[email protected]>
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Alex
> Deucher
> Sent: Tuesday, January 20, 2026 9:34 AM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>
> Subject: [PATCH 08/10] drm/amdgpu: simplify VCN reset helper
>
> Remove the wrapper function.
>
> Signed-off-by: Alex Deucher <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 41 ++++++++-----------------
>  1 file changed, 13 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index d22c8980fa42b..4de5c8b9a4cc4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -1481,19 +1481,27 @@ int vcn_set_powergating_state(struct
> amdgpu_ip_block *ip_block,  }
>
>  /**
> - * amdgpu_vcn_reset_engine - Reset a specific VCN engine
> - * @ring: Pointer to the VCN ring
> - * @timedout_fence: fence that timed out
> + * amdgpu_vcn_ring_reset - Reset a VCN ring
> + * @ring: ring to reset
> + * @vmid: vmid of guilty job
> + * @timedout_fence: fence of timed out job
>   *
> + * This helper is for VCN blocks without unified queues because
> + * resetting the engine resets all queues in that case.  With
> + * unified queues we have one queue per engine.
>   * Returns: 0 on success, or a negative error code on failure.
>   */
> -static int amdgpu_vcn_reset_engine(struct amdgpu_ring *ring,
> -                                struct amdgpu_fence *timedout_fence)
> +int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,
> +                       unsigned int vmid,
> +                       struct amdgpu_fence *timedout_fence)
>  {
>       struct amdgpu_device *adev = ring->adev;
>       struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[ring->me];
>       int r, i;
>
> +     if (adev->vcn.inst[ring->me].using_unified_queue)
> +             return -EINVAL;
> +
>       mutex_lock(&vinst->engine_reset_mutex);
>       /* Stop the scheduler's work queue for the dec and enc rings if they are
> running.
>        * This ensures that no new tasks are submitted to the queues while @@ -
> 1537,29 +1545,6 @@ static int amdgpu_vcn_reset_engine(struct amdgpu_ring
> *ring,
>       return r;
>  }
>
> -/**
> - * amdgpu_vcn_ring_reset - Reset a VCN ring
> - * @ring: ring to reset
> - * @vmid: vmid of guilty job
> - * @timedout_fence: fence of timed out job
> - *
> - * This helper is for VCN blocks without unified queues because
> - * resetting the engine resets all queues in that case.  With
> - * unified queues we have one queue per engine.
> - * Returns: 0 on success, or a negative error code on failure.
> - */
> -int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,
> -                       unsigned int vmid,
> -                       struct amdgpu_fence *timedout_fence)
> -{
> -     struct amdgpu_device *adev = ring->adev;
> -
> -     if (adev->vcn.inst[ring->me].using_unified_queue)
> -             return -EINVAL;
> -
> -     return amdgpu_vcn_reset_engine(ring, timedout_fence);
> -}
> -
>  int amdgpu_vcn_reg_dump_init(struct amdgpu_device *adev,
>                            const struct amdgpu_hwip_reg_entry *reg, u32 
> count)  {
> --
> 2.52.0

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