On Fri, Jan 23, 2026 at 5:17 AM Jesse.Zhang <[email protected]> wrote: > > Extend the GFX12 compute MQD initialization to support > Compute Unit (CU) masking for fine-grained resource allocation. > This allows compute queues to be limited to specific CUs for > performance isolation and debugging purposes. > > Signed-off-by: Jesse Zhang <[email protected]>
Patches 1-4: Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 33 ++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > index 6cd16f016c37..73478dd0f6ad 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > @@ -3110,6 +3110,37 @@ static int gfx_v12_0_cp_async_gfx_ring_resume(struct > amdgpu_device *adev) > return gfx_v12_0_cp_gfx_start(adev); > } > > +static void gfx_v12_0_compute_mqd_set_cu_mask(struct amdgpu_device *adev, > + struct v12_compute_mqd *mqd, > + struct amdgpu_mqd_prop *prop) > +{ > + uint32_t se_mask[8] = {0}; > + uint32_t wa_mask; > + bool has_wa_flag = prop->cu_flags & (AMDGPU_UPDATE_FLAG_DBG_WA_ENABLE > | > + AMDGPU_UPDATE_FLAG_DBG_WA_DISABLE); > + > + if (!has_wa_flag && (!prop->cu_mask || !prop->cu_mask_count)) > + return; > + > + if (has_wa_flag) { > + wa_mask = (prop->cu_flags & AMDGPU_UPDATE_FLAG_DBG_WA_ENABLE) > ? > + 0xffff : 0xffffffff; > + mqd->compute_static_thread_mgmt_se0 = wa_mask; > + mqd->compute_static_thread_mgmt_se1 = wa_mask; > + mqd->compute_static_thread_mgmt_se2 = wa_mask; > + mqd->compute_static_thread_mgmt_se3 = wa_mask; > + return; > + } > + > + amdgpu_gfx_mqd_symmetrically_map_cu_mask(adev, prop->cu_mask, > + prop->cu_mask_count, se_mask); > + > + mqd->compute_static_thread_mgmt_se0 = se_mask[0]; > + mqd->compute_static_thread_mgmt_se1 = se_mask[1]; > + mqd->compute_static_thread_mgmt_se2 = se_mask[2]; > + mqd->compute_static_thread_mgmt_se3 = se_mask[3]; > +} > + > static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m, > struct amdgpu_mqd_prop *prop) > { > @@ -3243,6 +3274,8 @@ static int gfx_v12_0_compute_mqd_init(struct > amdgpu_device *adev, void *m, > /* set UQ fenceaddress */ > mqd->fence_address_lo = lower_32_bits(prop->fence_address); > mqd->fence_address_hi = upper_32_bits(prop->fence_address); > + /* set CU mask */ > + gfx_v12_0_compute_mqd_set_cu_mask(adev, mqd, prop); > > return 0; > } > -- > 2.49.0 >
