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On Tue, Jan 27, 2026 at 12:37 AM Alex Deucher <[email protected]> wrote:
>
> The EXEC_COUNT field must be > 0.  In the gfx shadow
> handling we always emit a cond_exec packet after the gfx_shadow
> packet, but the EXEC_COUNT never gets patched.  This leads
> to a hang when we try and reset queues on gfx11 APUs.
>
> Fixes: c68cbbfd54c6 ("drm/amdgpu: cleanup conditional execution")
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4789
> Signed-off-by: Alex Deucher <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 72ec455fa932c..44f230d67da24 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -235,7 +235,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
> int num_ibs,
>
>         amdgpu_ring_ib_begin(ring);
>
> -       if (ring->funcs->emit_gfx_shadow)
> +       if (ring->funcs->emit_gfx_shadow && adev->gfx.cp_gfx_shadow)
>                 amdgpu_ring_emit_gfx_shadow(ring, shadow_va, csa_va, gds_va,
>                                             init_shadow, vmid);
>
> @@ -291,7 +291,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
> int num_ibs,
>                                        fence_flags | AMDGPU_FENCE_FLAG_64BIT);
>         }
>
> -       if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec) {
> +       if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec &&
> +           adev->gfx.cp_gfx_shadow) {
>                 amdgpu_ring_emit_gfx_shadow(ring, 0, 0, 0, false, 0);
>                 amdgpu_ring_init_cond_exec(ring, ring->cond_exe_gpu_addr);
>         }
> --
> 2.52.0
>

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