AMDGPU_GTT_MAX_TRANSFER_SIZE represented the maximum number of system-page-sized pages that could be transferred in a single operation. The effective maximum transfer size was intended to be one PMD-sized mapping.
In the existing code, AMDGPU_GTT_MAX_TRANSFER_SIZE was hard-coded to 512 pages. This corresponded to 2 MB on 4 KB page-size systems, matching the PMD size. However, on systems with a non-4 KB page size, this value no longer matched the PMD size. This patch changed the calculation of AMDGPU_GTT_MAX_TRANSFER_SIZE to derive it from PMD_SHIFT and PAGE_SHIFT, ensuring that the maximum transfer size remained PMD-sized across all system page sizes. Additionally, in some places, AMDGPU_GTT_MAX_TRANSFER_SIZE was implicitly assumed to be based on 4 KB pages. This resulted in incorrect address offset calculations. This patch updated the address calculations to correctly handle non-4 KB system page sizes as well. amdgpu_ttm_map_buffer() can create both GTT GART entries and VRAM GART entries. For GTT mappings, amdgpu_gart_map() takes system page–sized PFNs, and the mappings are created correctly. However, for VRAM GART mappings, amdgpu_gart_map_vram_range() expects GPU page–sized PFNs, but CPU page–sized PFNs were being passed, resulting in incorrect mappings. This patch updates the code to pass GPU page–sized PFNs to amdgpu_gart_map_vram_range(), ensuring that VRAM GART mappings are created correctly. Signed-off-by: Donet Tom <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 +++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +- drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 3 ++- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 2b931e855abd..e4a11944a1fe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -191,7 +191,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, int r; BUG_ON(adev->mman.buffer_funcs->copy_max_bytes < - AMDGPU_GTT_MAX_TRANSFER_SIZE * 8); + AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GPU_PAGES_IN_CPU_PAGE * 8); if (WARN_ON(mem->mem_type == AMDGPU_PL_PREEMPT)) return -EINVAL; @@ -217,7 +217,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, *addr = adev->gmc.gart_start; *addr += (u64)window * AMDGPU_GTT_MAX_TRANSFER_SIZE * - AMDGPU_GPU_PAGE_SIZE; + AMDGPU_GPU_PAGES_IN_CPU_PAGE * AMDGPU_GPU_PAGE_SIZE; *addr += offset; num_dw = ALIGN(adev->mman.buffer_funcs->copy_num_dw, 8); @@ -235,7 +235,8 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, src_addr += job->ibs[0].gpu_addr; dst_addr = amdgpu_bo_gpu_offset(adev->gart.bo); - dst_addr += window * AMDGPU_GTT_MAX_TRANSFER_SIZE * 8; + dst_addr += window * AMDGPU_GTT_MAX_TRANSFER_SIZE * + AMDGPU_GPU_PAGES_IN_CPU_PAGE * 8; amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_addr, dst_addr, num_bytes, 0); @@ -256,6 +257,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, } else { u64 pa = mm_cur->start + adev->vm_manager.vram_base_offset; + num_pages *= AMDGPU_GPU_PAGES_IN_CPU_PAGE; amdgpu_gart_map_vram_range(adev, pa, 0, num_pages, flags, cpu_addr); } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index 577ee04ce0bf..d9020a60c13e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -38,7 +38,7 @@ #define AMDGPU_PL_MMIO_REMAP (TTM_PL_PRIV + 5) #define __AMDGPU_PL_NUM (TTM_PL_PRIV + 6) -#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512 +#define AMDGPU_GTT_MAX_TRANSFER_SIZE (1 << (PMD_SHIFT - PAGE_SHIFT)) #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2 extern const struct attribute_group amdgpu_vram_mgr_attr_group; diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c index 9ae424618556..b2d4114c258c 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c @@ -48,7 +48,8 @@ #define VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK 0x02 #define VCE_V1_0_GART_PAGE_START \ - (AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS) + (AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GPU_PAGES_IN_CPU_PAGE * \ + AMDGPU_GTT_NUM_TRANSFER_WINDOWS) #define VCE_V1_0_GART_ADDR_START \ (VCE_V1_0_GART_PAGE_START * AMDGPU_GPU_PAGE_SIZE) -- 2.52.0
