[AMD Official Use Only - AMD Internal Distribution Only] Series is : Reviewed-by: Mukul Joshi <[email protected]>
> -----Original Message----- > From: Yu, Lang <[email protected]> > Sent: Tuesday, January 27, 2026 9:21 PM > To: [email protected] > Cc: Zhang, Hawking <[email protected]>; Deucher, Alexander > <[email protected]>; Joshi, Mukul <[email protected]>; > Belanger, David <[email protected]>; Yu, Lang <[email protected]> > Subject: [PATCH v2 1/4] drm/amdgpu: Add a helper macro to align mqd size > > MES FW uses address(mqd_addr + sizeof(struct mqd) + 3*sizeof(uint32_t)) as > fence address and writes a 32 bit fence value to this address. Driver needs to > allocate some extra memory(at least 4 DWs) in addition to sizeof(struct mqd) > as mqd memory. > > For gfx11/12, sizeof(struct mqd) < PAGE_SIZE, KGD allocates mqd memory > with PAGE_SIZE aligned works. For gfx12.1, sizeof(struct mqd) == PAGE_SIZE, > it doesn't work. > > KFD mqd manager hardcodes mqd size to PAGE_SIZE/MQD_SIZE across > different IP versions to solve this issue. > > To avoid hardcoding in differnet places and across different IP versions. > Let's use AMDGPU_MQD_SIZE_ALIGN instead. It is used in two places. > > 1. mqd memory alloction > 2. mqd stride handling for multi xcc config > > v2: Use AMDGPU_GPU_PAGE_ALIGN. (Mukul) > > Signed-off-by: Lang Yu <[email protected]> > Reviewed-by: David Belanger <[email protected]> (v1) > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 9c11535c44c6..8c6edb0f58dd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -1239,6 +1239,14 @@ struct amdgpu_device { > struct amdgpu_kfd_dev kfd; > }; > > +/* > + * MES FW uses address(mqd_addr + sizeof(struct mqd) + > +3*sizeof(uint32_t)) > + * as fence address and writes a 32 bit fence value to this address. > + * Driver needs to allocate at least 4 DWs extra memory in addition to > + * sizeof(struct mqd). Add 8 DWs and align to AMDGPU_GPU_PAGE_SIZE for > safety. > + */ > +#define AMDGPU_MQD_SIZE_ALIGN(mqd_size) > +AMDGPU_GPU_PAGE_ALIGN(((mqd_size) + 32)) > + > static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, > uint8_t ip, uint8_t inst) > { > -- > 2.34.1
