[AMD Official Use Only - AMD Internal Distribution Only] The series is: Reviewed-by: Tao Zhou <[email protected]>
> -----Original Message----- > From: Xie, Patrick <[email protected]> > Sent: Tuesday, February 3, 2026 12:12 PM > To: [email protected] > Cc: Zhou1, Tao <[email protected]>; Chai, Thomas <[email protected]>; > Wang, Yang(Kevin) <[email protected]>; Xie, Patrick > <[email protected]> > Subject: [PATCH V2 01/14] drm/amd/pm: add pmfw eeprom messages into uniras > interface > > add pmfw eeprom related messages into smu_v13_0_6_ras_send_msg > > v2: add sriov check before sending smu commands > > Signed-off-by: Gangliang Xie <[email protected]> > --- > drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > index 57f4069bc827..ec29906b82b5 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > @@ -3497,14 +3497,25 @@ static int smu_v13_0_6_reset_vcn(struct smu_context > *smu, uint32_t inst_mask) > > static int smu_v13_0_6_ras_send_msg(struct smu_context *smu, enum > smu_message_type msg, uint32_t param, uint32_t *read_arg) { > + struct amdgpu_device *adev = smu->adev; > int ret; > > + if (amdgpu_sriov_vf(adev)) > + return -EOPNOTSUPP; > + > switch (msg) { > case SMU_MSG_QueryValidMcaCount: > case SMU_MSG_QueryValidMcaCeCount: > case SMU_MSG_McaBankDumpDW: > case SMU_MSG_McaBankCeDumpDW: > case SMU_MSG_ClearMcaOnRead: > + case SMU_MSG_GetRASTableVersion: > + case SMU_MSG_GetBadPageCount: > + case SMU_MSG_GetBadPageMcaAddr: > + case SMU_MSG_SetTimestamp: > + case SMU_MSG_GetTimestamp: > + case SMU_MSG_GetBadPageIpid: > + case SMU_MSG_EraseRasTable: > ret = smu_cmn_send_smc_msg_with_param(smu, msg, param, > read_arg); > break; > default: > -- > 2.34.1
