Tune SDMA 5.0.x per-queue reset firmware version thresholds for specific ASICs: 5.0.0: Require fw >=24 5.0.2: Adjust fw threshold to >=30 5.0.1: Add new check with fw >=38
Signed-off-by: Jesse.Zhang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index d72bd3adfccf..72492692f680 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -1432,17 +1432,32 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block) amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring); switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { case IP_VERSION(5, 0, 0): + if ((adev->sdma.instance[0].fw_version >= 24) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; + case IP_VERSION(5, 0, 1): + if ((adev->sdma.instance[0].fw_version >= 38) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; case IP_VERSION(5, 0, 2): + if ((adev->sdma.instance[0].fw_version >= 30) && + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; + break; case IP_VERSION(5, 0, 5): if ((adev->sdma.instance[0].fw_version >= 35) && - !amdgpu_sriov_vf(adev) && - !adev->debug_disable_gpu_ring_reset) + !amdgpu_sriov_vf(adev) && + !adev->debug_disable_gpu_ring_reset) adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; - break; + break; default: break; } - /* Allocate memory for SDMA IP Dump buffer */ ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); if (ptr) -- 2.49.0
